Datasheet

CON

2.7V to 5.5V

OUT

10 PF

4.7 PF

SGND

PGND

3.3 PH

Fosc = 2 MHz

LM3208

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SNVS404B –APRIL 2006–REVISED MARCH 2013

The 8-Bump package used for LM3208 has 300micron solder balls and requires 10.82mil pads for mounting on

the circuit board. The trace to each pad should enter the pad with a 90°entry angle to prevent debris from being

caught in deep corners. Initially, the trace to each pad should be 7mil wide, for a section approximately 7mil long,

as a thermal relief. Then each trace should neck up or down to its optimal width. The important criterion is

symmetry. This ensures the solder bumps on the LM3208 re-flow evenly and that the device solders level to the

board. In particular, special attention must be paid to the pads for bumps A1 and A3. Because PGND and PV

are typically connected to large copper planes, inadequate thermal relief’s can result in late or inadequate re-flow

of these bumps.

The DSBGA package is optimized for the smallest possible size in applications with red or infrared opaque

cases. Because the DSBGA package lacks the plastic encapsulation characteristic of larger devices, it is

vulnerable to light. Backside metallization and/or epoxy coating, along with front-side shading by the printed

circuit board, reduce this sensitivity. However, the package has exposed die edges. In particular, DSBGA

devices are sensitive to light (in the red and infrared range) shining on the package’s exposed die edges.

Board Layout Considerations

Figure 36. Current Loop

The LM3208 converts higher input voltage to lower output voltage with high efficiency. This is achieved with an

inductor-based switching topology. During the first half of the switching cycle, the internal PMOS switch turns on,

the input voltage is applied to the inductor, and the current flows from PV

line into the output capacitor and the

load through the inductor. During the second half cycle, the PMOS turns off and the internal NMOS turns on. The

inductor current continues to flow via the inductor from the device PGND line into the output capacitor and the

load.

Referring to Figure 36, a pulse current flows in the left hand side loop, and a ripple current flows in the right hand

side loop. Board layout and circuit pattern design of these two loops are the key factors for reducing noise

radiation and stable operation. In other lines, such as from battery to C1 and C2 to the load, the current is mostly

DC current. Therefore, it is not necessary to take so much care. Only pattern width (current capability) and DCR

drop considerations are needed.

Product Folder Links: LM3208