Datasheet

'I
L
=
(V
IN
- V
OUT
) x t
ON
L
I
valley
= I
OUT
-
'I
L
2
R
LIM
=
I
CL
x R
DS(ON)max
I
LIM-TH
I
CL
= I
OCL
-
'I
L
2
LM3150
www.ti.com SNVS561D –SEPTEMBER 2008–REVISED MARCH 2011
Over-Voltage Comparator
The over-voltage comparator is provided to protect the output from over-voltage conditions due to sudden input
line voltage changes or output loading changes. The over-voltage comparator continuously monitors the voltage
at the FB pin and compares it to a 0.72V internal reference. If the voltage at FB rises above 0.72V, the on-time
pulse is immediately terminated. This condition can occur if the input or the output load changes suddenly. Once
the over-voltage protection is activated, the HG and LG signals remain off until the voltage at FB pin falls below
0.72V.
Current Limit
Current limit detection occurs during the off-time by monitoring the current through the low-side switch using an
external resistor, R
LIM
. If during the off-time the current in the low-side switch exceeds the user defined current
limit value, the next on-time cycle is immediately terminated. Current sensing is achieved by comparing the
voltage across the low side FET with the voltage across the current limit set resistor R
LIM
. If the voltage across
R
LIM
and the voltage across the low-side FET are equal then the current limit comparator will terminate the next
on-time cycle.
The R
LIM
value can be approximated as follows:
(6)
where
• I
OCL
is the user-defined average output current limit value
• R
DS(ON)max
is the resistance value of the low-side FETat the expected maximum FET junction temperature
• I
LIM-TH
is an internal current supply of 85 µA typical (7)
Figure 12 illustrates the inductor current waveform. During normal operation, the output current ripple is dictated
by the switching of the FETs. The current through the low-side switch, I
valley
, is sampled at the end of each
switching cycle and compared to the current limit, I
CL
, current. The valley current can be calculated as follows:
where
• I
OUT
is the average output current
• ΔI
L
is the peak-to-peak inductor ripple current (8)
If an overload condition occurs, the current through the low-side switch will increase which will cause the current
limit comparator to trigger the logic to skip the next on-time cycle. The IC will then try to recover by checking the
valley current during each off-time. If the valley current is greater than or equal to I
CL
, then the IC will keep the
low-side FET on and allow the inductor current to further decay.
Throughout the whole process, regardless of the load current, the on-time of the controller will stay constant and
thereby the positive ripple current slope will remain constant. During each on-time the current ramps-up an
amount equal to:
(9)
The valley current limit feature prevents current runaway conditions due to propagation delays or inductor
saturation since the inductor current is forced to decay following any overload conditions.
Current sensing is achieved by either a low value sense resistor in series with the low-side FET or by utilizing the
R
DS(ON)
of the low-side FET. The R
DS(ON)
sensing method is the preferred choice for a more simplified design and
lower costs. The R
DS(ON)
value of a FET has a positive temperature coefficient and will increase in value as the
FET’s temperature increases. The LM3150 controller will maintain a more stable current limit that is closer to the
original value that was set by the user, by positively adjusting the I
LIM-TH
value as the IC temperature increases.
This does not provide an exact temperature compensation but allows for a more tightly controlled current limit
when compared to traditional R
DS(ON)
sensing methods when the R
DS(ON)
value can change typically 140% from
room to maximum temperature and cause other components to be over-designed. The temperature
compensated I
LIM-TH
is shown below where T
J
is the die temperature of the LM3150 in Celsius:
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