Datasheet

LM3150
www.ti.com SNVS561D –SEPTEMBER 2008–REVISED MARCH 2011
The max power dissipation of the RJK0305DPB is rated as 45W for a junction temperature that is 125°C higher
than the case temperature and a thermal resistance from the FET junction to case, θ
JC
, of 2.78°C/W. When the
FET is mounted onto the PCB, the PCB will have some additional thermal resistance such that the total system
thermal resistance of the FET package and the PCB, θ
JA
, is typically in the range of 30°C/W for this type of FET
package. The max power dissipation, Pdmax, with the FET mounted onto a PCB with a 125°C junction
temperature rise above ambient temperature and θ
JA
= 30°C/W, can be estimated by:
Pdmax = 125°C / 30°C/W = 4.1W
The system calculated Pdh of 0.674W is much less than the FET Pdmax of 4.1W and therefore the
RJK0305DPB max allowable power dissipation criteria is met.
Low-Side MOSFET
Primary loss is conduction loss given by:
Pdl = Iout
2
x R
DS(ON)
x (1-D) = 12
2
x 0.01 x (1-0.275) = 1W
Pdl is also less than the Pdmax specified on the RJK0305DPB MOSFET datasheet.
However, it is not always necessary to use the same MOSFET for both the high-side and low-side. For most
applications it is necessary to choose the high-side MOSFET with the lowest gate charge and the low-side
MOSFET is chosen for the lowest allowed R
DS(ON)
. The plateau voltage of the FET V
GS
vs Q
g
curve must be less
than VCC - 750 mV.
The current limit resistor, R
LIM
, is calculated by estimating the R
DS(ON)
of the low-side FET at the maximum
junction temperature of 100°C. By choosing to go into current limit when the average output load current is 20%
higher than the output load current of 12A while the inductor ripple current ratio is 1/3 of the load current will
make I
CL
= 10.4A. Then the following calculation of R
LIM
is:
R
LIM
= (10.4 x 0.014) / (75 x 10
-6
) = 1.9 kΩ
Let R
LIM
= 1.91 kΩ which is the next standard value.
8. Calculate Input Capacitance
The input capacitor should be chosen so that the voltage rating is greater than the maximum input voltage which
for this example is 24V. Similar to the output capacitor, the voltage rating needed will depend on the type of
capacitor chosen. The input capacitor should also be able to handle the input rms current, which is a maximum
of approximately 0.5 x I
OUT
. For this example the rms input current is approximately 0.5 x 12A = 6A.
The minimum capacitance with a maximum 5% input ripple ΔV
IN-MAX
= (0.05 x 12) = 0.6V:
C
IN
= [12 x 0.275 x (1-0.275)] / [500 kHz x 0.6] = 8 µF
To handle the large input rms current 2 ceramic capacitors are chosen at 10 µF each with a voltage rating of 50V
and case size of 1210. Each ceramic capacitor is capable of handling 3A of rms current. A aluminum electrolytic
of 5 times the combined input capacitance, 5 x 20 µF = 100 µF, is chosen to provide input voltage filter damping
because of the low ESR ceramic input capacitors.
C
BYP
= 0.1µF ceramic with a voltage rating greater than maximum V
IN
9. Calculate Soft-Start Capacitor
The soft start-time should be greater than the input voltage rise time and also satisfy the following equality to
maintain a smooth transition of the output voltage to the programmed regulation voltage during startup. The
desired soft-start time, tss, of 5 ms also needs to satisfy the equality in equation 12, by using the chosen
component values through the previous steps as shown below:
5 ms > (3.3V x 300 µF) / (1.2 x 12A - 12A)
5 ms > 0.412 ms
Since the desired soft-start time satisfies the equality in equation 12, the soft start capacitor is calculated as:
C
SS
= (7.7 µA x 5 ms) / 0.6V = 0.064 µF
Let C
SS
= 0.068 µF, which is the next closest standard value. This should be a ceramic cap with a voltage rating
greater than 10V.
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