Datasheet

LM3103

SNVS523F –SEPTEMBER 2007–REVISED APRIL 2013

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PC BOARD LAYOUT

The LM3103 regulation, over-voltage, and current limit comparators are very fast so they will respond to short

duration noise pulses. Layout is therefore critical for optimum performance. It must be as neat and compact as

possible, and all external components must be as close to their associated pins of the LM3103 as possible. Refer

to the Simplified Functional Block Diagram. The loop formed by C

, the main and synchronous MOSFET internal

to the LM3103, and the PGND pin should be as small as possible. The connection from the PGND pin to C

should be as short and direct as possible. Vias should be added to connect the ground of C

to a ground plane,

located as close to the capacitor as possible. The bootstrap capacitor C

BST

should be connected as close to the

SW and BST pins as possible, and the connecting traces should be thick. The feedback resistors and capacitor

FB1

, R

FB2

, and C

should be close to the FB pin. A long trace running from V

OUT

to R

FB1

is generally acceptable

since this is a low impedance node. Ground R

FB2

directly to the AGND pin (pin 7). The output capacitor C

OUT

should be connected close to the load and tied directly to the ground plane. The inductor L should be connected

close to the SW pin with as short a trace as possible to reduce the potential for EMI (electromagnetic

interference) generation. If it is expected that the internal dissipation of the LM3103 will produce excessive

junction temperature during normal operation, making good use of the PC board’s ground plane can help

considerably to dissipate heat. The exposed pad on the bottom of the LM3103 IC package can be soldered to

the ground plane, which should extend out from beneath the LM3103 to help dissipate heat. The exposed pad is

internally connected to the LM3103 IC substrate. Additionally the use of thick traces, where possible, can help

conduct heat away from the LM3103. Using numerous vias to connect the die attached pad to the ground plane

is a good practice. Judicious positioning of the PC board within the end product, along with the use of any

available air flow (forced or natural convection) can help reduce the junction temperature.

Figure 26. Typical Application Schematic for V

OUT

= 3.3V

Figure 27. Typical Application Schematic for V

OUT

= 0.6V

Product Folder Links: LM3103