Datasheet
PC Board Layout
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C10: The output capacitor should generally be no smaller than 10 µF. Experiment is usually necessary to
determine the minimum value for the output capacitor, as the nature of the load may require a larger
value. A load which creates significant transients requires a larger output capacitor than a fixed load. In
this demonstration board, a 47 µF capacitor is used to provide a low output ripple.
C12: C12 is a small value ceramic capacitor located close to the LM3103 to further suppress high
frequency noise at V
OUT
. A 47 nF capacitor is used in this demonstration board.
4 PC Board Layout
The LM3103 regulation, over-voltage, and current limit comparators are very fast so they will respond to
short duration noise pulses. Layout is therefore critical for optimum performance. It must be as neat and
compact as possible, and all external components must be as close to their associated pins of the
LM3103 as possible. The loop formed by C1, the main and synchronous MOSFET internal to the LM3103,
and the PGND pin should be as small as possible. The connection from the PGND pin to the input
capacitors should be as short and direct as possible. Vias should be added to connect the ground of the
input capacitors to a ground plane, located as close to the capacitor as possible. The bootstrap capacitor
C4 should be connected as close to the SW and BST pins as possible, and the connecting traces should
be thick. The feedback resistors and capacitor R3, R4, and C9 should be close to the FB pin. A long trace
running from V
OUT
to R3 is generally acceptable since this is a low impedance node. Ground R4 directly to
the AGND pin (pin 7). The output capacitor C10 should be connected close to the load and tied directly to
the ground plane. The inductor L1 should be connected close to the SW pin with as short a trace as
possible to reduce the potential for EMI (electromagnetic interference) generation. If it is expected that the
internal dissipation of the LM3103 will produce excessive junction temperature during normal operation,
making good use of the PC board’s ground plane can help considerably to dissipate heat. The exposed
pad on the bottom of the LM3103 IC package can be soldered to the ground plane, which should extend
out from beneath the LM3103 to help dissipate heat. The exposed pad is internally connected to the
LM3103 IC substrate. Additionally the use of thick traces, where possible, can help conduct heat away
from the LM3103. Using numerous vias to connect the die attached pad to the ground plane is a good
practice. Judicious positioning of the PC board within the end product, along with the use of any available
air flow (forced or natural convection) can help reduce the junction temperature.
5 Bill of Materials
Designation Description Size Manufacturer Part # Vendor
C1 Cap 10µF 50V Y5V 1210 GRM32DF51H106ZA01L Murata
C3 0603/X7R/0.1µF/50V 0603 ECJ1VB1H104K Panasonic
C4, C5 0603/X7R/33000pF/50V 0603 ECJ1VB1H333K Panasonic
C8 0603/X5R/1µF/10V 0603 GRM188R61A105KA61B Murata
C9 0603/X7R/10000pF/50V 0603 ECJ1VB1H103K Panasonic
GRM188R71H103KA01B Murata
C10 1210/X5R/47µF/6.3V 1210 ECJ4YB0J476M Panasonic
GRM32ER60J476ME20B Murata
C12 0603/X7R/47000pF/50V 0603 ECJ1VB1H473K Panasonic
R1 Resistor Chip 78.7kΩ F 0603 CRCW06037872F Vishay
R3 Resistor Chip 10kΩ F 0603 CRCW06031002F Vishay
R4 Resistor Chip 2.21kΩ F 0603 CRCW06032211F Vishay
L1 Power Inductor 18µH 1.45A 6.8×6.8×3 CDR6D28MNNP-180NC Sumida
Power Inductor 18µH 1.7A 7.3×7.3×3.2 7447789118 Wurth
U1 IC LM3103 HTSSOP-16 LM3103 Texas Instruments
PCB LM3103 demo board Texas Instruments
6
AN-1678 LM3103 Demonstration Board Reference Design SNVA268A–October 2007–Revised April 2013
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