Datasheet
2
V+
1
GND
1
V 2O
VO2
VO2
VO2
VO2
VO2
VO2
VO2
VO2
VO2
VO2
IN-A
IN-A
IN-A
IN-B
IN-B
IN-B
IN-D
IN-D
IN-D
IN-D
V+
V+
GND
GND
GND
GND
GND
IN-C
IN-C
VIN2
VIN2
V+
V+
V+
V+
IN-B
V+
V+
V+
V+
V+
V+
V+
D
V+
V+
V+
V+
V+
V+
V+
V+
V+
V+
IN-C
IN-C
IN-C
IN-D
IN-D
IN-C
GND
IN-C
N
N+C
V+
GND
VIN
IN-A
IN-B
GND
IN+B
VO VO
VO
VO
VO
VO
V+
V+
VO
VO
IN-B
2
IN+D
2
IN+D
1
IN+D
1
V 2O
1
V 2O
1
GND
2
V+
2
V+
2
V+
2
V+
1
IN-D
1
IN-D
1
IN+C
2
IN+C
2
GND
1
IN-C
2
IN-C
2
IN-C
1
VIN2
2
IN+B
2
IN+B
1
IN+B
1
IN+A
2
IN+A
2
V+
2
V+
1
GND
1
GND
2
IN-A
2
IN-A
1
VIN
1
VO
1
VO
1
IN-A
1
V+
2
V+
2
V+
2
V+
1
VO
1
IN-B
1
IN-B
2
GND
2
GND
1 : VO
2 : IN-B
3 : V+
4 : IN-A
5 : IN+A
6 : IN-B
14 : VO2
13 : IN-D
12 : GND
11 : IN+C
10 : IN-C
9 : IN+D
7 : IN+B
8 : IN-D
LM124-N
,
LM224-N
LM2902-N
,
LM324-N
www.ti.com
SNOSC16D –MARCH 2000–REVISED JANUARY 2015
9 Power Supply Recommendations
The pinouts of the package have been designed to simplify PC board layouts. Inverting inputs are adjacent to
outputs for all of the amplifiers and the outputs have also been placed at the corners of the package (pins 1, 7, 8,
and 14).
Precautions should be taken to insure that the power supply for the integrated circuit never becomes reversed in
polarity or that the unit is not inadvertently installed backwards in a test socket as an unlimited current surge
through the resulting forward diode within the IC could cause fusing of the internal conductors and result in a
destroyed unit.
10 Layout
10.1 Layout Guidelines
The V + pin should be bypassed to ground with a low-ESR capacitor. The optimum placement is closest to the V
+ and ground pins.
Take care to minimize the loop area formed by the bypass capacitor connection between V + and ground.
The ground pin should be connected to the PCB ground plane at the pin of the device.
The feedback components should be placed as close to the device as possible minimizing strays.
10.2 Layout Example
Figure 43. Layout Example
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