Datasheet
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
NC
PGND
PGND
PGND
PVIN
PVIN
PVIN
NC NC
AVIN
EN
SW
SW
SS
AGND
FB
EXP
LM2854 Pin-Out
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2 LM2854 Pin-Out
Figure 2. LM2854 Pin-Out
3 LM2854 Pin Descriptions
Table 1. LM2854 Pin Descriptions
Pin Number Name Description
1 NC Reserved for factory use, this pin should be connected to GND to ensure proper operation.
2,3,4 PGND Power ground pins for the internal power switches. These pins should be connected together locally at
the device and tied to the PC board ground plane.
5,6,7 PVIN Input voltage to the power switches inside the device. These pins should be connected together at the
device. A low ESR input capacitance should be located as close as possible to these pins.
8,9 NC Reserved for factory use, these pins should be connected to GND to ensure proper operation.
10 AVIN Analog input voltage supply that generates the internal bias. The UVLO circuit derives its input from
this pin also. Thus, if the voltage on AVIN falls below the UVLO threshold, both internal FETs are
turned off. It is recommended to connect PVIN to AVIN through a low pass RC filter to minimize the
influence of input rail ripple and noise on the analog control circuitry. The series resistor should be 1Ω
and the bypass capacitor should be a X7R ceramic type 0.1 µF to 1.0 µF.
11 EN Active high enable input for the device. Typically, turn-on threshold is 1.23V with 0.15V hysteresis. An
external resistor divider from PVIN can be used to effectively increase the UVLO turn-on threshold. If
not used, the EN pin should be connected to PVIN.
12,13 SW Switch node pins. This is the PWM output of the internal MOSFET power switches. These pins should
be tied together locally and connected to the filter inductor.
14 SS Soft-start control pin. An internal 2 µA current source charges an external capacitor connected between
this pin and AGND to set the output voltage ramp rate during startup. This pin can also be used to
configure the tracking feature.
15 AGND Quiet analog ground for the internal bias circuitry.
16 FB Feedback pin is connected to the inverting input of the voltage loop error amplifier. A 0.8V bandgap
reference is connected to the non-inverting input of the error amplifier.
EXP Exposed Exposed metal pad on the underside of the package with a weak electrical connection to PGND. It is
Pad recommended to connect this pad to the PC board ground plane in order to improve thermal
dissipation.
2
AN-1786 LM2854 500 kHz Buck Regulator Evaluation Board SNVA323B–March 2008–Revised May 2013
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