Datasheet
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LM2750
www.ti.com
SNVS180L –APRIL 2002–REVISED MAY 2013
APPLICATION INFORMATION
OUTPUT VOLTAGE RIPPLE
The amount of voltage ripple on the output of the LM2750 is highly dependent on the application conditions:
output current and the output capacitor, specifically. A simple approximation of output ripple is determined by
calculating the amount of voltage droop that occurs when the output of the LM2750 is not being driven. This
occurs during the charge phase (φ1). During this time, the load is driven solely by the charge on the output
capacitor. The magnitude of the ripple thus follows the basic discharge equation for a capacitor (I = C × dV/dt),
where discharge time is one-half the switching period, or 0.5/F
SW
. Put simply,
A more thorough and accurate examination of factors that affect ripple requires including effects of phase non-
overlap times and output capacitor equivalent series resistance (ESR). In order for the LM2750 to operate
properly, the two phases of operation must never coincide. (If this were to happen all switches would be closed
simultaneously, shorting input, output, and ground). Thus, non-overlap time is built into the clocks that control the
phases. Since the output is not being driven during the non-overlap time, this time should be accounted for in
calculating ripple. Actual output capacitor discharge time is approximately 60% of a switching period, or 0.6/F
SW
.
The ESR of the output capacitor also contributes to the output voltage ripple, as there is effectively an AC
voltage drop across the ESR due to current switching in and out of the capacitor. The following equation is a
more complete calculation of output ripple than presented previously, taking into account phase non-overlap time
and capacitor ESR.
A low-ESR ceramic capacitor is recommended on the output to keep output voltage ripple low. Placing multiple
capacitors in parallel can reduce ripple significantly, both by increasing capacitance and reducing ESR. When
capacitors are in parallel, ESR is in parallel as well. The effective net ESR is determined according to the
properties of parallel resistance. Two identical capacitors in parallel have twice the capacitance and half the ESR
as compared to a single capacitor of the same make. On a similar note, if a large-value, high-ESR capacitor
(tantalum, for example) is to be used as the primary output capacitor, the net output ESR can be significantly
reduced by placing a low-ESR ceramic capacitor in parallel with this primary output capacitor.
CAPACITORS
The LM2750 requires 3 external capacitors for proper operation. Surface-mount multi-layer ceramic capacitors
are recommended. These capacitors are small, inexpensive and have very low equivalent series resistance
(≤10mΩ typ.). Tantalum capacitors, OS-CON capacitors, and aluminum electrolytic capacitors generally are not
recommended for use with the LM2750 due to their high ESR, as compared to ceramic capacitors.
For most applications, ceramic capacitors with X7R or X5R temperature characteristic are preferred for use with
the LM2750. These capacitors have tight capacitance tolerance (as good as ±10%), hold their value over
temperature (X7R: ±15% over -55ºC to 125ºC; X5R: ±15% over -55ºC to 85ºC), and typically have little voltage
coefficient. Capacitors with Y5V and/or Z5U temperature characteristic are generally not recommended. These
types of capacitors typically have wide capacitance tolerance (+80%, -20%), vary significantly over temperature
(Y5V: +22%, -82% over -30ºC to +85ºC range; Z5U: +22%, -56% over +10ºC to +85ºC range), and have poor
voltage coefficients. Under some conditions, a nominal 1µF Y5V or Z5U capacitor could have a capacitance of
only 0.1µF. Such detrimental deviation is likely to cause these Y5V and Z5U of capacitors to fail to meet the
minimum capacitance requirements of the LM2750.
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