Datasheet

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BOOT

SEN

PGND

PWGD

FREQ/SYNC

SS/TRACK

SGND

EAO

PGND

= 3.3V

OUT

= 1.2V@16A

FB2

BOOT

1,2

FB1

1,2

LM2745

PULL-UP

FADJ

Clk

LM2745, LM2748

www.ti.com

SNOSAL2E –APRIL 2005–REVISED APRIL 2013

LM2745 / LM2748 Synchronous Buck Controller with Pre-Bias Startup, and Optional Clock

Synchronization

Check for Samples: LM2745, LM2748

FEATURES

DESCRIPTION

The LM2745/8 are high-speed synchronous buck

• Switching Frequency from 50 kHz to 1 MHz

regulator controllers with an accurate feedback

• Switching Frequency Synchronize Range 250

voltage accuracy of ±1.5%. It can provide simple

kHz to 1 MHz (LM2745 Only)

down conversion to output voltages as low as 0.6V.

• Startup with a Pre-biased Output Load

Though the control sections of the IC are rated for 3

to 6V, the driver sections are designed to accept

• Power Stage Input Voltage from 1V to 14V

input supply rails as high as 14V. The use of adaptive

• Control Stage Input Voltage from 3V to 6V

non-overlapping MOSFET gate drivers helps avoid

• Output Voltage Adjustable Down to 0.6V

potential shoot-through problems while maintaining

high efficiency. The IC is designed for the more cost-

• Power Good Flag and Shutdown

effective option of driving only N-channel MOSFETs

• Output Overvoltage and Undervoltage

in both the high-side and low-side positions. It senses

Detection

the low-side switch voltage drop for providing a

• ±1.5% Feedback Voltage Accuracy Over

simple, adjustable current limit.

Temperature

The LM2745/8 features a fixed-frequency voltage-

• Low-side Adjustable Current Sensing

mode PWM control architecture which is adjustable

from 50 kHz to 1 MHz with one external resistor. In

• Adjustable Soft-start

addition, the LM2745 also allows the switching

• Tracking and Sequencing with Shutdown and

frequency to be synchronized to an external clock

Soft Start Pins

signal over the range of 250 kHz to 1 MHz. This wide

• TSSOP-14 Package

range of switching frequency gives the power supply

designer the flexibility to make better tradeoffs

APPLICATIONS

between component size, cost and efficiency.

• Down Conversion from 3.3V

Features include the ability to startup with a pre-

biased load on the output, soft-start, input

• Cable Modem, DSL and ADSL

undervoltage lockout (UVLO) and Power Good

• Laser Jet and Ink Jet Printers

(based on both undervoltage and overvoltage

• Low Voltage Power Modules

detection). In addition, the shutdown pin of the IC can

be used for providing startup delay, and the soft-start

• DSP, ASIC, Core and I/O

pin can be used for implementing precise tracking, for

the purpose of sequencing with respect to an external

rail.

Typical Application

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (36 pages)

PAGE 1
LM2745, LM2748 www.ti.com SNOSAL2E – APRIL 2005 – REVISED APRIL 2013 LM2745 / LM2748 Synchronous Buck Controller with Pre-Bias Startup, and Optional Clock Synchronization Check for Samples: LM2745, LM2748 FEATURES DESCRIPTION • • The LM2745/8 are high-speed synchronous buck regulator controllers with an accurate feedback voltage accuracy of ±1.5%. It can provide simple down conversion to output voltages as low as 0.6V.
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LM2745, LM2748 SNOSAL2E – APRIL 2005 – REVISED APRIL 2013 1 2 3 4 5 6 7 BOOT LG HG LM2745 PGND SD PGND SGND FREQ/SYNC VCC PWGD ISEN FB SS/TRACK EAO www.ti.com 14 1 13 2 12 3 11 4 10 5 9 6 8 7 Figure 1. 14-Lead Plastic TSSOP, θJA = 155°C/W Top View Package Number PW0014A BOOT LG HG LM2748 PGND PGND SD SGND FREQ VCC PWGD ISEN FB SS/TRACK EAO 14 13 12 11 10 9 8 Figure 2.
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LM2745, LM2748 www.ti.com SNOSAL2E – APRIL 2005 – REVISED APRIL 2013 Absolute Maximum Ratings (1) (2) VCC -0.3 to 7V BOOT Voltage -0.3 to 18V ISEN -0.3 to 14V FREQ/SYNC Voltage -0.5 to VCC + 0.3V All other pins -0.3 to VCC + 0.
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LM2745, LM2748 SNOSAL2E – APRIL 2005 – REVISED APRIL 2013 www.ti.com Electrical Characteristics (continued) VCC = 3.3V unless otherwise indicated. Typicals and limits appearing in plain type apply for TA= TJ= 25°C. Limits appearing in boldface type apply over full Operating Temperature Range. Datasheet min/max specification limits are specified by design, test, or statistical analysis. Symbol VEAO Parameter Conditions Error Amplifier Output Voltage Min Typ Max Units Minimum 1 V Maximum 2.
PAGE 5
LM2745, LM2748 www.ti.com SNOSAL2E – APRIL 2005 – REVISED APRIL 2013 Typical Performance Characteristics Efficiency (VOUT = 1.2V) VCC = 3.3V, fSW = 1 MHz Internal Reference Voltage vs Temperature Figure 3. Figure 4. Frequency vs Temperature Output Voltage vs Output Current Figure 5. Figure 6. Switch Waveforms VCC = 3.3V, VIN = 5V, VOUT = 1.2V IOUT = 3A, CSS = 12 nF, fSW = 1 MHz Start-Up (Full-Load) VCC = 3.3V, VIN = 5V, VOUT = 1.2V IOUT = 3A, CSS = 12 nF, fSW = 1 MHz Figure 7. Figure 8.
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LM2745, LM2748 SNOSAL2E – APRIL 2005 – REVISED APRIL 2013 www.ti.com Typical Performance Characteristics (continued) 6 Start-Up (No-Load) VCC = 3.3V, VIN = 5V, VOUT = 1.2V CSS = 12 nF, fSW = 1 MHz Shutdown (Full-Load) VCC = 3.3V, VIN = 5V, VOUT = 1.2V IOUT = 3A, CSS = 12 nF, fSW = 1 MHz Figure 9. Figure 10. Load Transient Response VCC = 3.3V, VIN = 14V, VOUT = 1.2V fSW = 1 MHz Line Transient Response (VIN = 3V to 9V) VCC = 3.3V, VOUT = 1.2V IOUT = 2A, fSW = 1 MHz Figure 11. Figure 12.
PAGE 7
LM2745, LM2748 www.ti.com SNOSAL2E – APRIL 2005 – REVISED APRIL 2013 Typical Performance Characteristics (continued) Maximum Duty Cycle vs VCC, fSW = 600 kHz Maximum Duty Cycle vs VCC, fSW = 1 MHz Figure 15. Figure 16.
PAGE 8
LM2745, LM2748 SNOSAL2E – APRIL 2005 – REVISED APRIL 2013 www.ti.com Block Diagram FREQ/SYNC* VCC SD PGND PGND SGND UVLO PLL* CLOCK & RAMP SHUT DOWN LOGIC BOOT 10 Ps DELAY HG SSDONE PWGD SYNCHRONOUS DRIVER LOGIC OV UV LG 0.71V 0.434V 10 PA Zero Detector SS/TRACK 1VPP PWM LOGIC PWM Soft-Start Comparator + Logic REF 40 PA - + 90 PA ISEN ILIM EA - + VREF=0.
PAGE 9
LM2745, LM2748 www.ti.com SNOSAL2E – APRIL 2005 – REVISED APRIL 2013 APPLICATION INFORMATION The LM2745/8 is a voltage-mode, high-speed synchronous buck regulator with a PWM control scheme. It is designed for use in set-top boxes, thin clients, DSL/Cable modems, and other applications that require high efficiency buck converters. It has output shutdown (SD), input undervoltage lock-out (UVLO) mode and power good (PWGD) flag (based on overvoltage and undervoltage detection).
PAGE 10
LM2745, LM2748 SNOSAL2E – APRIL 2005 – REVISED APRIL 2013 www.ti.com It is recommended to choose an AC coupling capacitance in the range of 50 pF to 100 pF. Exceeding the recommended capacitance may inject excessive energy through the internal clamping diode structure present on the FREQ/SYNC pin. The typical trip level of the synchronization pin is 1.5V. To ensure proper synchronization and to avoid damaging the IC, the peak-to-peak value (amplitude) should be between 2.5V and VCC.
PAGE 11
LM2745, LM2748 www.ti.com SNOSAL2E – APRIL 2005 – REVISED APRIL 2013 Master Power Supply VOUT1 = 5V RT2 1 k: VOUT2 = 1.8V SS/TRACK VSS = 0.65V RT1 150: LM2745/8 FB RFB2 10 k: VFB RFB1 5 k: Figure 19. Tracking Circuit One way to use the tracking feature is to design the tracking resistor divider so that the master supply’s output voltage (VOUT1) and the LM2745/8’s output voltage (represented symbolically in Figure 19 as VOUT2, i.e.
PAGE 12
LM2745, LM2748 SNOSAL2E – APRIL 2005 – REVISED APRIL 2013 www.ti.com For the example case of VOUT1 = 5V and VOUT2 = 1.8V, with RT1 set to 150Ω as before, RT2 is calculated from the above equation to be 265Ω. A timing diagram for the case of equal slew rates is shown in Figure 21. 5V 1.8V VOUT1 1.8V VOUT2 Figure 21.
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LM2745, LM2748 www.ti.com SNOSAL2E – APRIL 2005 – REVISED APRIL 2013 For example, if the master supply output voltage slew rate was 1V/ms and the desired delay time between the startup of the master supply and LM2745/8 output voltage was 5 ms, then the desired SD pin slew rate would be (1.08V/5 ms) = 0.216V/ms. Due to the internal impedance of the SD pin, the maximum recommended value for RS2 is 1 kΩ. To achieve the desired slew rate, RS1 would then be 274Ω.
PAGE 14
LM2745, LM2748 SNOSAL2E – APRIL 2005 – REVISED APRIL 2013 www.ti.com MOSFET GATE DRIVERS The LM2745/8 has two gate drivers designed for driving N-channel MOSFETs in a synchronous mode. Note that unlike most other synchronous controllers, the bootstrap capacitor of the LM2745/8 provides power not only to the driver of the upper MOSFET, but the lower MOSFET driver too (both drivers are ground referenced, i.e. no floating driver). Two things must be kept in mind here.
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LM2745, LM2748 www.ti.com SNOSAL2E – APRIL 2005 – REVISED APRIL 2013 LM2745/8 BOOT D1 VCC CBOOT VIN HG + VO + LG Figure 25. Basic Charge Pump (Bootstrap) Note that the LM2745/8 can be paired with a low cost linear regulator like the LM78L05 to run from a single input rail between 6.0 and 14V. The 5V output of the linear regulator powers both the VCC and the bootstrap circuit, providing efficient drive for logic level MOSFETs. An example of this circuit is shown in Figure 26.
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LM2745, LM2748 SNOSAL2E – APRIL 2005 – REVISED APRIL 2013 www.ti.com LM2745/8 BOOT D3 HG D2 D1 VCC VIN + VO LG + Figure 27. Charge Pump with Added Gate Drive All the gate drive circuits shown in the above figures typically use 100 nF ceramic capacitors in the bootstrap locations. POWER GOOD SIGNAL The open drain output on the Power Good pin needs a pull-up resistor to a low voltage source. The pull-up resistor should be chosen so that the current going into the Power Good pin is less than 1 mA.
PAGE 17
LM2745, LM2748 www.ti.com SNOSAL2E – APRIL 2005 – REVISED APRIL 2013 For example, a conservative 15A current limit in a 10A design with a RDSON-HOT of 10 mΩ would require a 6 kΩ resistor. The minimum value for RCS in any application is 1 kΩ. Because current sensing is done across the lowside MOSFET, no minimum high-side on-time is necessary.
PAGE 18
LM2745, LM2748 SNOSAL2E – APRIL 2005 – REVISED APRIL 2013 www.ti.com DESIGN CONSIDERATIONS The following is a design procedure for all the components needed to create the Typical Application Circuit. This design converts 3.3V (VIN) to 1.2V (VOUT) at a maximum load of 4A with an efficiency of 89% and a switching frequency of 300 kHz. The same procedures can be followed to create many other designs with varying input voltages, output voltages, and load currents.
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LM2745, LM2748 www.ti.com SNOSAL2E – APRIL 2005 – REVISED APRIL 2013 Output Capacitor The output capacitor forms the second half of the power stage of a Buck switching converter. It is used to control the output voltage ripple (ΔVOUT) and to supply load current during fast load transients. In this example the output current is 4A and the expected type of capacitor is an aluminum electrolytic, as with the input capacitors.
PAGE 20
LM2745, LM2748 SNOSAL2E – APRIL 2005 – REVISED APRIL 2013 www.ti.com Support Components CIN2 - A small (0.1 to 1 µF) ceramic capacitor should be placed as close as possible to the drain of the high-side MOSFET and source of the low-side MOSFET (dual MOSFETs make this easy). This capacitor should be X5R type dielectric or better. RCC, CCC- These are standard filter components designed to ensure smooth DC voltage for the chip supply. RCC should be 1 to 10Ω. CCC should 1 µF, X5R type or better.
PAGE 21
LM2745, LM2748 www.ti.com SNOSAL2E – APRIL 2005 – REVISED APRIL 2013 The power stage modulator provides a DC gain ADC that is equal to the input voltage divided by the peak-to-peak value of the PWM ramp. This ramp is 1.0Vpk-pk for the LM2745/8. The inductor and output capacitor create a double pole at frequency fDP, and the capacitor ESR and capacitance create a single zero at frequency fESR. For this example, with VIN = 3.3V, these quantities are: VIN ADC = VRAMP = 3.3 = 10.4 dB 1.
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LM2745, LM2748 SNOSAL2E – APRIL 2005 – REVISED APRIL 2013 www.ti.com The double pole at 4.5 kHz causes the phase to drop to approximately -130° at around 10 kHz. The ESR zero, at 20.3 kHz, provides a +90° boost that prevents the phase from dropping to -180º. If this loop were left uncompensated, the bandwidth would be approximately 10 kHz and the phase margin 53°.
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LM2745, LM2748 www.ti.com SNOSAL2E – APRIL 2005 – REVISED APRIL 2013 60 GAIN (dB) 48 36 24 12 0 100 1k 10k 100k 1M FREQUENCY (Hz) 50 PHASE (o) 20 -10 -40 -70 -100 100 1k 10k 100k 1M FREQUENCY (Hz) Figure 31. Error Amp. Gain and Phase In VM regulators, the top feedback resistor RFB2 forms a part of the compensation. Setting RFB2 to 10 kΩ±1%, usually gives values for the other compensation resistors and capacitors that fall within a reasonable range.
PAGE 24
LM2745, LM2748 SNOSAL2E – APRIL 2005 – REVISED APRIL 2013 www.ti.com CC3 = 2.7 nF±10%, RC1 = 39.2 kΩ±1% RC2 = 2.
PAGE 25
LM2745, LM2748 www.ti.com SNOSAL2E – APRIL 2005 – REVISED APRIL 2013 The bandwidth of this example circuit is 59 kHz, with a phase margin of 60°. EFFICIENCY CALCULATIONS The following is a sample calculation. A reasonable estimation of the efficiency of a switching buck controller can be obtained by adding together the Output Power (POUT) loss and the Total Power (PTOTAL) loss: POUT K= POUT + PTOTAL x 100% The Output Power (POUT) for the Typical Application Circuit design is (1.2V x 4A) = 4.8W.
PAGE 26
LM2745, LM2748 SNOSAL2E – APRIL 2005 – REVISED APRIL 2013 IRMS_RIP = IOUT x www.ti.com D(1 - D) Here n is the number of paralleled capacitors, ESR is the equivalent series resistance of each, and PCAP is the dissipation in each. So for example if we use only one input capacitor of 24 mΩ. 2 PCAP = (1.924A) x 24 m: 1 2 PCAP = 88.8 mW Output Inductor Loss (PIND) PIND = I2OUT x DCR where DCR is the DC resistance.
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LM2745, LM2748 www.ti.com SNOSAL2E – APRIL 2005 – REVISED APRIL 2013 PART PART NUMBER TYPE PACKAGE U1 LM2745 Synchronous Controller TSSOP-14 DESCRIPTION VENDOR Q1 FDS6898A Dual N-MOSFET SO-8 D1 MBR0520LTI Schottky Diode SOD-123 L1 DO3316P-472 Inductor CIN1 16SP100M Aluminum Electrolytic 10mm x 6mm 100 µF, 16V, 2.89Arms Sanyo CO1 6SP220M Aluminum Electrolytic 10mm x 6mm 220 µF, 6.3V 3.1Arms Sanyo CCC, CBOOT, CIN2, CO2 VJ1206Y104KXXA Capacitor 1206 0.
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LM2745, LM2748 SNOSAL2E – APRIL 2005 – REVISED APRIL 2013 www.ti.com PART PART NUMBER TYPE PACKAGE U1 LM2745 Synchronous Controller TSSOP-14 DESCRIPTION VENDOR Q1 FDS6898A Dual N-MOSFET SO-8 D1 MBR0520LTI Schottky Diode SOD-123 L1 DO3316P-682 Inductor 6.8 µH, 4.4Arms, 27 mΩ Coilcraft CIN1 16SP100M Aluminum Electrolytic 10mm x 6mm 100 µF, 16V, 2.89Arms Sanyo CO1 10SP56M Aluminum Electrolytic 6.3mm x 6mm 56 µF, 10V 1.
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LM2745, LM2748 www.ti.com SNOSAL2E – APRIL 2005 – REVISED APRIL 2013 PART PART NUMBER TYPE PACKAGE U1 LM2745 Synchronous Controller TSSOP-14 Q1 FDS6898A Dual N-MOSFET SO-8 D1 MBR0520LTI Schottky Diode SOD-123 L1 DO3316P-332 Inductor CIN1 16SP100M Aluminum Electrolytic 10mm x 6mm CO1 6SP220M Aluminum Electrolytic CCC, CBOOT, CIN2, CO2 VJ1206Y104KXXA CC3 CSS DESCRIPTION VENDOR TI 20V, 10 mΩ @ 4.5V, 16 nC Fairchild 3.3 µH, 5.4Arms 15 mΩ Coilcraft 100 µF, 16V, 2.
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LM2745, LM2748 SNOSAL2E – APRIL 2005 – REVISED APRIL 2013 www.ti.com REVISION HISTORY Changes from Revision D (April 2013) to Revision E • 30 Page Changed layout of National Data Sheet to TI format ..........................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
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PACKAGE OPTION ADDENDUM www.ti.com 5-Nov-2013 Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant LM2745MTCX/NOPB TSSOP PW 14 2500 330.0 12.4 6.95 8.3 1.6 8.0 12.0 Q1 LM2748MTCX/NOPB TSSOP PW 14 2500 330.0 12.4 6.95 8.3 1.6 8.0 12.
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PACKAGE MATERIALS INFORMATION www.ti.com 23-Sep-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM2745MTCX/NOPB TSSOP PW 14 2500 367.0 367.0 35.0 LM2748MTCX/NOPB TSSOP PW 14 2500 367.0 367.0 35.
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