Datasheet

V
IN
± 9.5V
R
CS
10 mA
t
LM2743
SNVS276G –APRIL 2004–REVISED MARCH 2013 www.ti.com
The Power Good signal is an OR-gated flag which takes into account both output over-voltage and under-voltage
conditions. If the feedback pin (FB) voltage is 18% above its nominal value (118% x V
FB
= 0.708V) or falls 28%
below that value (72 %x V
FB
= 0.42V) the Power Good flag goes low. The Power Good flag can be used to signal
other circuits that the output voltage has fallen out of regulation, however the switching of the LM2743 continues
regardless of the state of the Power Good signal. The Power Good flag will return to logic high whenever the
feedback pin voltage is between 72% and 118% of 0.6V.
UVLO
The 2.76V turn-on threshold on V
CC
has a built in hysteresis of about 300 mV. If V
CC
drops below 2.42V, the chip
enters UVLO mode. UVLO consists of turning off the top and bottom MOSFETS and remaining in that condition
until V
CC
rises above 2.76V. As with shutdown, the soft-start capacitor is discharged through an internal
MOSFET, ensuring that the next start-up will be controlled by the soft-start circuitry.
CURRENT LIMIT
Current limit is realized by sensing the voltage across the low-side MOSFET while it is on. The R
DS(ON)
of the
MOSFET is a known value; hence the current through the MOSFET can be determined as:
V
DS
= I
OUT
x R
DS(ON)
The current through the low-side MOSFET while it is on is also the falling portion of the inductor current. The
current limit threshold is determined by an external resistor, R
CS
, connected between the switching node and the
I
SEN
pin. A constant current of 40 µA is forced through R
CS
, causing a fixed voltage drop. This fixed voltage is
compared against V
DS
and if the latter is higher, the current limit of the chip has been reached. To obtain a more
accurate value for R
CS
you must consider the operating values of R
DS(ON)
and I
SEN-TH
at their operating
temperatures in your application and the effect of slight parameter differences from part to part. R
CS
can be found
by using the following equation using the R
DS(ON)
value of the low side MOSFET at it's expected hot temperature
and the absolute minimum value expected over the full temperature range for the for the I
SEN-TH
which is 25 µA:
R
CS
= R
DSON-HOT
x I
LIM
/ 40 µA
For example, a conservative 15A current limit in a 10A design with a minimum R
DS(ON)
of 10 mΩ would require a
6 kΩ resistor. To prevent the I
SEN
pin from sinking too much current when the switch node goes above 9.5V, the
value of the current limit setting resistor R
CS
should not be too low. The criterion is as follows,
where the 10 mA is the maximum current I
SEN
pin is allowed to sink. For example if V
IN
= 13.2V, the minimum
value of R
CS
is 370Ω. Because current sensing is done across the low-side MOSFET, no minimum high-side on-
time is necessary. The LM2743 enters current limit mode if the inductor current exceeds the current limit
threshold at the point where the high-side MOSFET turns off and the low-side MOSFET turns on. (The point of
peak inductor current, see Figure 32). Note that in normal operation mode the high-side MOSFET always turns
on at the beginning of a clock cycle. In current limit mode, by contrast, the high-side MOSFET on-pulse is
skipped. This causes inductor current to fall. Unlike a normal operation switching cycle, however, in a current
limit mode switching cycle the high-side MOSFET will turn on as soon as inductor current has fallen to the
current limit threshold. The LM2743 will continue to skip high-side MOSFET pulses until the inductor current peak
is below the current limit threshold, at which point the system resumes normal operation.
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