Datasheet

LM2743
www.ti.com SNVS276G –APRIL 2004–REVISED MARCH 2013
where ‘n’ is the number of MOSFETs (if multiple devices have been placed in parallel), V
DD
is the driving voltage
(see MOSFET GATE DRIVERS section) and Q
GS
is the gate charge of the MOSFET. If different types of
MOSFETs are used, the ‘n’ term can be ignored and their gate charges simply summed to form a cumulative Q
G
.
Gate charge loss differs from conduction and switching losses in that the actual dissipation occurs in the
LM2743, and not in the MOSFET itself.
Switching loss occurs during the brief transition period as the high-side MOSFET turns on and off, during which
both current and voltage are present in the channel of the MOSFET. It can be approximated as:
P
SW
= 0.5 x V
IN
x I
O
x (t
r
+ t
f
) x f
SW
where t
R
and t
F
are the rise and fall times of the MOSFET. Switching loss occurs in the high-side MOSFET only.
For this example, the maximum drain-to-source voltage applied to either MOSFET is 3.6V. The maximum drive
voltage at the gate of the high-side MOSFET is 3.1V, and the maximum drive voltage for the low-side MOSFET
is 3.3V. Due to the low drive voltages in this example, a MOSFET that turns on fully with 3.1V of gate drive is
needed. For designs of 5A and under, dual MOSFETs in SOIC-8 package provide a good trade-off between size,
cost, and efficiency.
Support Components
C
IN
2 - A small value (0.1 µF to 1 µF) ceramic capacitor should be placed as close as possible to the drain of the
high-side MOSFET and source of the low-side MOSFET (dual MOSFETs make this easy). This capacitor should
be X5R type dielectric or better.
R
CC
, C
CC
- These are standard filter components designed to ensure smooth DC voltage for the chip supply. R
CC
should be 1Ω to 10Ω. C
CC
should 1 µF, X5R type or better.
C
BOOT
- Bootstrap capacitor, typically 100 nF.
R
PULL-UP
– This is a standard pull-up resistor for the open-drain power good signal (PWGD). The recommended
value is 10 kΩ connected to V
CC
. If this feature is not necessary, the resistor can be omitted.
D
1
- A small Schottky diode should be used for the bootstrap. It allows for a minimum drop for both high and low-
side drivers. The MBR0520 or BAT54 work well in most designs.
R
CS
- Resistor used to set the current limit. Since the design calls for a peak current magnitude (I
OUT
+ (0.5 x
ΔI
OUT
)) of 4.8A, a safe setting would be 6A. (This is below the saturation current of the output inductor, which is
7A.) Following the equation from the CURRENT LIMIT section, a 1.3 kΩ resistor should be used.
R
FADJ
- This resistor is used to set the switching frequency of the chip. The resistor value is calculated from
equation in NORMAL OPERATION section. For 300 kHz operation, a 97.6 kΩ resistor should be used.
C
SS
- The soft-start capacitor depends on the user requirements and is calculated based on the equation given in
the section titled START UP/SOFT-START. Therefore, for a 700 μs delay, a 12 nF capacitor is suitable.
Control Loop Compensation
The LM2743 uses voltage-mode (‘VM’) PWM control to correct changes in output voltage due to line and load
transients. One of the attractive advantages of voltage mode control is its relative immunity to noise and layout.
However VM requires careful small signal compensation of the control loop for achieving high bandwidth and
good phase margin.
The control loop is comprised of two parts. The first is the power stage, which consists of the duty cycle
modulator, output inductor, output capacitor, and load. The second part is the error amplifier, which for the
LM2743 is a 9 MHz op-amp used in the classic inverting configuration. Figure 35 shows the regulator and control
loop components.
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