Datasheet

LM2742

BOOT

SEN

PGND

PWGD

FREQ

SGND

EAO

PGND

7 8

LM2742

SNVS266C –MARCH 2004–REVISED MARCH 2013

www.ti.com

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

CONNECTION DIAGRAM

Figure 2. 14-Lead Plastic TSSOP

= 155°C/W

PIN DESCRIPTIONS

BOOT (Pin 1) - Supply rail for the N-channel MOSFET gate drive. The voltage should be at least one gate

threshold above the regulator input voltage to properly turn on the high-side N-FET.

LG (Pin 2) - Gate drive for the low-side N-channel MOSFET. This signal is interlocked with HG to avoid shoot-

through problems

PGND (Pins 3, 13) - Ground for FET drive circuitry. It should be connected to system ground.

SGND (Pin 4) - Ground for signal level circuitry. It should be connected to system ground.

(Pin 5) - Supply rail for the controller.

PWGD (Pin 6) - Power Good. This is an open drain output. The pin is pulled low when the chip is in UVP, OVP,

or UVLO mode. During normal operation, this pin is connected to V

or other voltage source through a pull-up

resistor.

ISEN (Pin 7) - Current limit threshold setting. This sources a fixed 50µA current. A resistor of appropriate value

should be connected between this pin and the drain of the low-side FET.

EAO (Pin 8) - Output of the error amplifier. The voltage level on this pin is compared with an internally generated

ramp signal to determine the duty cycle. This pin is necessary for compensating the control loop.

SS (Pin 9) - Soft start pin. A capacitor connected between this pin and ground sets the speed at which the output

voltage ramps up. Larger capacitor value results in slower output voltage ramp but also lower inrush current.

FB (Pin 10) - This is the inverting input of the error amplifier, which is used for sensing the output voltage and

compensating the control loop.

FREQ (Pin 11) - The switching frequency is set by connecting a resistor between this pin and ground.

SD (Pin 12) - IC Logic Shutdown. When this pin is pulled low the chip turns off both the high side and low side

switches. While this pin is low, the IC will not start up. An internal 20µA pull-up connects this pin to V

. For a

device which turns on the low side switch during shutdown, see the pin compatible LM2737.

HG (Pin 14) - Gate drive for the high-side N-channel MOSFET. This signal is interlocked with LG to avoid shoot-

through problems.

Product Folder Links: LM2742