Datasheet

t
SS
=
0.6V x C
SS
I
SS
6.4A x
1
8 x 300 kHz x 240 PF
2
(0.75 m:)+
= 12 mV
p-p
2
'V
OUT
= 'I
L
x
1
8 x f
SW
x C
OUT
2
R
ESR
2
+
L
MIN
=
(V
IN
- V
OUT
) x D
'I
L
x f
SW
(12V - 1.5V) x 0.125
(0.3 x 20A) x 300 kHz
=
= 0.73 PH
'V
IN
=
20A x 0.125 x (1- 0.125)
110 PF x 300 kHz
= 66 mV
www.ti.com Evaluation Board Component Selection
Ceramic capacitors feature a very large I
RMS
rating in a small footprint, making a ceramic capacitor ideal
for this application. Five 22 µF X5R 25V ceramic capacitors were selected to provide the necessary input
capacitance for the evaluation board. Neglecting the effects of ESR, at 12V V
IN
and 20A I
OUT
the selected
input capacitors yield an input voltage ripple of:
(5)
If desired, two extra capacitors can be added in the C
in6
and C
in7
footprints.
9.3 Inductor, L
out
As per datasheet recommendations, the inductor value should initially be chosen to produce a peak to
peak ripple current between 20% and 40% of the maximum operating output current. A 30% current ripple
was chosen for the LM27402 evaluation board. The minimum inductance required is calculated by:
(6)
An actual inductor is selected based on a trade-off between physical size, efficiency, and current carrying
capability. A Vishay IHLP5050 0.68 µH inductor results in a peak to peak current ripple of 6.4A and offers
a balance between efficiency (2.34 mΩ DCR), size (12.9 mm x 13.2 mm), and saturation current rating
(49A I
SAT
).
9.4 Output Capacitor, C
o1
- C
o4
The value of the output capacitor in a buck regulator influences the steady state voltage ripple as well as
the output voltage response to a load transient. Given the peak-to-peak inductor current ripple (ΔI
L
) the
output voltage ripple can be approximated by:
(7)
where ΔV
OUT
(V) is the amount of peak-to-peak voltage ripple at the power supply output, R
ESR
(Ω) is the
series resistance of the output capacitor, f
SW
(Hz) is the switching frequency, and C
OUT
(F) is the output
capacitance used in the design and is the sum of C
o1
through C
o4
. For the evaluation board, four 100 µF
6.3V X5R ceramic capacitors were selected for the output capacitance to provide adequate transient and
DC bias performance in a relatively small package. From the technical specifications of this capacitor, the
ESR is approximately 3 mΩ and the effective in-circuit capacitance is approximately 60 µF (reduced from
100 µF due to the 1.5V DC bias and worst case tolerance). With these values, the peak-to-peak voltage
ripple when operating from a VIN of 12V is:
(8)
9.5 Soft-Start Capacitor, C
ss
A soft-start capacitor can be used to control the startup time of the LM27402. The startup time is
estimated by the following equation:
(9)
I
SS
is nominally 3 µA. For the evaluation board, the soft-start time has been designed to be approximately
10 ms, resulting in a C
ss
capacitor value of 47 nF. The LM27402 defaults to a 1.28 ms startup ramp time if
C
ss
is not used.
9.6 Internal LDO Bypass Capacitor, C
dd
The C
dd
capacitor is necessary to bypass an internal 4.5V subregulator. This capacitor should be sized
equal to or greater than 1 µF but less than 10 µF. A value of 1 µF is sufficient for most applications and is
used in the LM27402 evaluation board.
7
SNVA406B–May 2010–Revised May 2013 AN-1992 LM27402 Evaluation Board
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