Datasheet

LM27x7
HG
BOOT
ISEN
LG
PGND
FB
Vcc
SD
PWGD
FREQ
SS
SGND
EAO
PGND
+
+
+5V
Vin = 5 to 15V
Vo = 1.8V@1A
1 x 15uF
25V, 3.3A
1 x 15uF
25V 3.1mohm
3.3uH
4.1A, 17.4 m:
Rfb2
Rfb1
Cc1
Cc2 Rc1
Rcs
Css
Rfadj
Rin
Cin
D1
Cboot
1uH
6.4A, 7.3 m:
Rc2
Cc3
LM27x7
HG
BOOT
ISEN
LG
PGND
FB
Vcc
SD
PWGD
FREQ
SS
SGND
EAO
PGND
+
+
+5V
Vin = 5 to 15V
Vo = 3.3V@1A
1 x 15uF
25V, 3.3A
1 x 15uF
25V 3.1 m:
4.7uH
3.4A, 26 m:
Rfb2
Rfb1
Cc1
Cc2 Rc1
Rcs
Rfadj
Rin
Cin
D1
Cboot
Q1/Q2
1uH
6.4 A, 7.3 m:
Rc2
Cc3
10
2.2u
0.1u
1.5k
10k
2.21k
0.1u
10
2.2u
17.4k
39n
22p
680p 10.7k
680p66.5
10k
4.99k
1.5k
17.4k
27p
1n
820p
12.1k
54.9
Co1
Cin1
Lin
L1
L1
Lin
Co1
Q1/Q2
LM2727, LM2737
SNVS205D –AUGUST 2002–REVISED MARCH 2013 www.ti.com
Figure 29. 1.8V and 3.3V, 1A, 1.4MHz, Simultaneous
The circuits in Figure 29 are intended for ADSL applications, where the high switching frequency keeps noise out
of the data transmission range. In this design, the 1.8 and 3.3V outputs come up simultaneously by using the
same softstart capacitor. Because two current sources now charge the same capacitor, the capacitance must be
doubled to achieve the same softstart time. (Here, 40nF is used to achieve a 5ms softstart time.) A common
softstart capacitor means that, should one circuit enter current limit, the other circuit will also enter current limit.
In addition, if both circuits are built with the LM2727, a UVP or OVP fault on one circuit will cause both circuits to
latch off. The additional compensation components Rc2 and Cc3 are needed for the low ESR, all ceramic output
capacitors, and the wide (3x) range of Vin.
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Product Folder Links: LM2727 LM2737