Datasheet

:
R
FB1(3)
= R
FB2(4)
x
V
OUT
- V
FB1(2)
V
FB1(2)
V
OUT
V
IN
, D' = (1-D)
D =
LM2717-ADJ
www.ti.com SNVS407C –DECEMBER 2005–REVISED MARCH 2013
BUCK OPERATION
PROTECTION (BOTH REGULATORS)
The LM2717-ADJ has dedicated protection circuitry running during normal operation to protect the IC. The
Thermal Shutdown circuitry turns off the power devices when the die temperature reaches excessive levels. The
UVP comparator protects the power devices during supply power startup and shutdown to prevent operation at
voltages less than the minimum input voltage. The OVP comparator is used to prevent the output voltage from
rising at no loads allowing full PWM operation over all load conditions. The LM2717-ADJ also features a
shutdown mode for each converter decreasing the supply current to approximately 10µA (both in shutdown
mode).
CONTINUOUS CONDUCTION MODE
The LM2717-ADJ contains current-mode, PWM buck regulators. A buck regulator steps the input voltage down
to a lower output voltage. In continuous conduction mode (when the inductor current never reaches zero at
steady state), the buck regulator operates in two cycles. The power switch is connected between V
IN
and SW1
and SW2.
In the first cycle of operation the transistor is closed and the diode is reverse biased. Energy is collected in the
inductor and the load current is supplied by C
OUT
and the rising current through the inductor.
During the second cycle the transistor is open and the diode is forward biased due to the fact that the inductor
current cannot instantaneously change direction. The energy stored in the inductor is transferred to the load and
output capacitor.
The ratio of these two cycles determines the output voltage. The output voltage is defined approximately as:
where
• where D is the duty cycle of the switch
• D and D′ will be required for design calculation (1)
The LM2717-ADJ has a minimum switch ON time which corresponds to a minimum duty cycle of approximately
10% at 600kHz operation and approximately 5% at 300kHz operation. In the case of some high voltage
differential applications (low duty cycle operation) this minimum duty cycle may be exceeded causing the
feedback pin over-voltage protection to trip as the output voltage rises. This will put the device into a PFM type
operation which can cause an unpredictable frequency spectrum and may cause the average output voltage to
rise slightly. If this is a concern the switching frequency may be lowered and/or a pre-load added to the output to
keep the device full PWM operation. Note that the OVP function monitors the FB pin so it will not function if the
feedback resistor is disconnected from the output. Due to slight differences between the two converters it is
recommended that Buck 1 be used for the lower of the two output voltages for best operation.
DESIGN PROCEDURE
This section presents guidelines for selecting external components.
SETTING THE OUTPUT VOLTAGE
The output voltage is set using the feedback pin and a resistor divider connected to the output as shown in
Figure 20. The feedback pin voltage (V
FB
) is 1.258V, so the ratio of the feedback resistors sets the output voltage
according to the following equation:
(2)
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