Datasheet

LM2698
www.ti.com SNVS153E –MAY 2001–REVISED APRIL 2013
Electrical Characteristics
Specifications in standard type face are for T
J
= 25°C and those with boldface type apply over the full Operating
Temperature Range ( T
J
= −40°C to +125°C)Unless otherwise specified. V
IN
=2.2V and I
L
= 0A, unless otherwise specified.
Min Typ Max
Symbol Parameter Conditions Units
(1) (2) (1)
I
Q
Quiescent Current FB = 0V (Not Switching) 1.3 2.0 mA
V
SHDN
= 0V 5 10 µA
V
FB
Feedback Voltage 1.2285 1.26 1.2915 V
I
CL
Switch Current Limit V
IN
= 2.7V
(3)
1.35 1.9 2.4 A
%V
FB
/ΔV
IN
Feedback Voltage Line 2.2V ≤ V
IN
≤ 12.0V 0.013 0.1 %/V
Regulation
I
B
FB Pin Bias Current 0.5 20 nA
(4)
V
IN
Input Voltage Range 2.2 12 V
g
m
Error Amp Transconductance ΔI = 5µA 40 135 290 µmho
A
V
Error Amp Voltage Gain 120 V/V
D
MAX
Maximum Duty Cycle FSLCT = Ground 78 85 %
D
MIN
Minimum Duty Cycle FSLCT = Ground 15 %
FSLCT = V
IN
30
f
S
Switching Frequency FSLCT = Ground 480 600 720 kHz
FSLCT = V
IN
1 1.25 1.5 MHz
I
SHDN
Shutdown Pin Current V
SHDN
= V
IN
0.01 0.1 µA
V
SHDN
= 0V −0.5 -1
I
L
Switch Leakage Current V
SW
= 18V 0.01 3 µA
R
DS(ON)
Switch R
DS(ON)
V
IN
= 2.7V, I
SW
= 1A 0.2 0.4 Ω
TH
SHDN
SHDN Threshold Voltage Output High 0.6 0.9 V
Output Low 0.3 0.6 V
UVP On Threshold 1.95 2.05 2.2 V
Off Threshold 1.85 1.95 2.1 V
θ
JA
Thermal Resistance Junction to Ambient 235 °C/W
(5)
Junction to Ambient 225
(6)
Junction to Ambient 220
(7)
Junction to Ambient 200
(8)
Junction to Ambient 195
(9)
(1) All limits are specified at room temperature (standard typeface) and at temperature extremes (bold typeface). All room temperature limits
are 100% tested or specified through statistical analysis. All limits at temperature extremes are specified via correlation using standard
Statistical Quality Control (SQC) methods. All limits are used to calculate Average Outgoing Quality Level (AOQL).
(2) Typical numbers are at 25°C and represent the most likely norm.
(3) This is the switch current limit at 0% duty cycle. The switch current limit will change as a function of duty cycle. See Typical performance
Characteristics section for I
CL
vs. V
IN
(4) Bias current flows into FB pin.
(5) Junction to ambient thermal resistance (no external heat sink) for the MSO8 package with minimal trace widths (0.010 inches) from the
pins to the circuit. See "Scenario 'A'" in the Power Dissipation section.
(6) Junction to ambient thermal resistance for the MSO8 package with minimal trace widths (0.010 inches) from the pins to the circuit and
approximately 0.0191 sq. in. of copper heat sinking. See "Scenario 'B'" in the Power Dissipation section.
(7) Junction to ambient thermal resistance for the MSO8 package with minimal trace widths (0.010 inches) from the pins to the circuit and
approximately 0.0465 sq. in. of copper heat sinking. See "Scenario 'C'" in the Power Dissipation section.
(8) Junction to ambient thermal resistance for the MSO8 package with minimal trace widths (0.010 inches) from the pins to the circuit and
approximately 0.2523 sq. in. of copper heat sinking. See "Scenario 'D'" in the Power Dissipation section.
(9) Junction to ambient thermal resistance for the MSO8 package with minimal trace widths (0.010 inches) from the pins to the circuit and
approximately 0.0098 sq. in. of copper heat sinking on the top layer and 0.0760 sq. in. of copper heat sinking on the bottom layer, with
three 0.020 in. vias connecting the planes. See "Scenario 'E'" in the Power Dissipation section.
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