Datasheet

V
OUT
x R
DSON
L =
Se

+ D - 0.5

SQ
1
'i
L
=
DV
IN
2Lf
s
I
COUT(RMS)
=
D
'i
L
2
(1-D)
>
>
I
OUT
2
(1-D)
2
+
3
I
CIN(RMS)
=
'i
L
/
=
1
2
V
in
V
o
- V
in
2
)
)
f
s
L V
o
3
3
LM2698
www.ti.com SNVS153E –MAY 2001–REVISED APRIL 2013
Input Capacitor
Due to the presence of an inductor at the input of a boost converter, the input current waveform is continuous
and triangular. The inductor ensures that the input capacitor sees fairly low ripple currents. However, as the
inductor gets smaller, the input ripple increases. The rms current in the input capacitor is given by:
(9)
The input capacitor should be capable of handling the rms current. Although the input capacitor is not so critical
in boost applications, a 10 µF or higher value, good quality capacitor prevents any impedance interactions with
the input supply.
A 0.1µF or 1µF ceramic bypass capacitor is also recommended on the V
IN
pin (pin 6) of the IC. This capacitor
must be connected very close to pin 6 to effectively filter high frequency noise. When operating at 1.25 MHz
switching frequency, a minimum bypass capacitance of 0.22 µF is recommended.
Output Capacitor
The output capacitor in a boost converter provides all the output current when the switch is closed and the
inductor is charging. As a result, it sees very large ripple currents. The output capacitor should be capable of
handling the maximum RMS current. The RMS current in the output capacitor is:
(10)
where,
(11)
and
D = (V
OUT
- V
IN
)/V
OUT
(12)
The ESR and ESL of the output capacitor directly control the output ripple. Use capacitors with low ESR and ESL
at the output for high efficiency and low ripple voltage. Surface mount tantalums, surface mount polymer
electrolytic, and polymer tantalum, Sanyo OS-CON, or multi-layer ceramic capacitors are recommended at the
output.
Compensation
This section presents a step-by-step procedure to design the compensation network at pin 1 (V
c
) of the LM2698.
These design methods will produce a conservative and stable control loop.
There is a minimum inductance requirement in any current mode converter. This is a function of V
OUT
, duty cycle,
and switching frequency, among other things. Figure 18 plots the recommended inductance range vs. duty cycle
for V
OUT
= 12V. The two lines represent the upper and lower bounds of the recommended inductance range. The
simplified compensation procedure that follows assumes that the inductance never drops below the Q = 5 line.
Figure 18 plots the equation:
(13)
where,
R
DSON
= 0.15,
Se = 0.072*f
S
,
and Q = 0.5 and 5
Use Q = 5 to calculate the minimum inductance recommended for a stable design. Choosing an inductor
between the Q = 0.5 and Q = 5 values provides a good tradeoff between size and stability. Note that as V
IN
drops less than 5V, R
DS(ON)
increases, as shown in the Typical Performance Characteristics section (R
DS(ON)
vs.V
IN
curve). The worst case R
DS(ON)
should be used when choosing the inductance. To view plots for different
Vout, multiply the Y axis by a factor of V
OUT
/12, or plot Equation 13 for the respective output voltage.
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