Datasheet

SW Pin
V
OUT
V
L
I
2
I
1
I
0
t
1
t
2
t
3
t
4
t
5
Inductor
Current
Nominal
Output
Voltage
LM2696
www.ti.com
SNVS375B OCTOBER 2005REVISED APRIL 2013
UNDER- & OVER-VOLTAGE CONDITIONS
The LM2696 has a built in under-voltage comparator that controls PGOOD. Whenever the output voltage drops
below the set threshold, the PGOOD open drain FET will turn on pulling the pin to ground. For an over-voltage
event, there is no separate comparator to control PGOOD. However, the loop responds to prevent this event
from occurring because the error comparator is essentially sensing an OVP event. If the output is above the
feedback threshold then the part will not switch back on; therefore, the worst-case condition is one on-time pulse.
CURRENT LIMIT
The LM2696 utilizes a peak-detect current limit that senses the current through the FET when conducting and
will immediately terminate the on-pulse whenever the peak current exceeds the threshold (4.9A typical). In
addition to terminating the present on-pulse, it enforces a mandatory off-time that is related to the feedback
voltage.
If current limit trips and the feedback voltage is close to its nominal value of 1.25V, the off-time imposed will be
relatively short. This is to prevent the output from dropping or any fold back from occurring if a momentary short
occurred because of a transient or load glitch. If a short circuit were present, the off-time would extend to
approximately 12 µs. This ensures that the inductor current will reach a low value (approximately 0A) before the
next switching cycle occurs. The extended off-time prevents runaway conditions caused by hard shorts and high
side blanking times.
If the part is in an over current condition, the output voltage will begin to drop as shown in Figure 21. If the output
voltage is dropping and the current is below the current limit threshold, (I
1
), the part will assert a pulse (t
2
) after a
minimum off-time (t
1
). This is in an attempt to raise the output voltage.
If the part is in an over current condition and the output voltage is below the regulation value (V
L
) as shown in
Figure 21, the part will assert a pulse of minimal width (t
4
) and extend the off-time (t
5
). In the event that the
voltage is below the regulation value (V
L
) and the current is below the current limit value, the part will assert two
(or more) pulses separated by some minimal off-time (t
1
).
Figure 21. Fault Condition Timing
Legend:
t
1
: Min off-time (165 ns typical)
t
2
: On-time (set by the user)
t
3
: Min off-time (165 ns typical)
t
4
: Blanking time (165 ns typical)
t
5
: Extended off-time (12 µs typical)
V
L
: UVP threshold
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