Datasheet

LM2653
www.ti.com SNVS050E –NOVEMBER 1999–REVISED APRIL 2013
LDELAY CAPACITOR
As mentioned in the Operation section, the LDELAY capacitor sets the time delay between the output voltage
goes below 80% of its nominal value and the undervoltage latch protection is enabled.
Charging the CDELAY by a 5 μA current source up to 2V sets the delay time. Therefore, T
DELAY
= C
DELAY
*
2V/5μA.
The undervoltage protection is disabled by tying the LDELAY pin to the ground.
R
1
and R
2
(PROGRAMMING OUTPUT VOLTAGE)
Use the following formula to select the appropriate resistor values:
V
OUT
= V
REF
(1 + R
1
/R
2
)
where
• V
REF
= 1.238V (6)
Select resistors between 10kΩ and 100kΩ. (1% or higher accuracy metal film resistors for R
1
and R
2
.)
COMPENSATION COMPONENTS
In the control to output transfer function, the first pole F
p1
can be estimated as 1/(2πR
OUT
C
OUT
); The ESR zero
F
z1
of the output capacitor is 1/(2πESRC
OUT
); Also, there is a high frequency pole F
p2
in the range of 45kHz to
150kHz:
F
p2
= F
s
/(πn(1−D))
where
• D = V
OUT
/V
IN
• n = 1+0.348L/(V
IN
−V
OUT
) (L is in µHs and V
IN
and V
OUT
in volts) (7)
The total loop gain G is approximately 500/I
OUT
where I
OUT
is in amperes.
A Gm amplifier is used inside the LM2653. The output resistor R
o
of the Gm amplifier is about 80kΩ. C
c1
and R
C
together with R
o
give a lag compensation to roll off the gain:
F
pc1
= 1/(2πC
c1
(R
o
+R
c
)), F
zc1
= 1/2πC
c1
R
c
. (8)
In some applications, the ESR zero F
z1
cannot be cancelled by F
p2
. Then, C
c2
is needed to introduce F
pc2
to
cancel the ESR zero, F
p2
= 1/(2πC
c2
R
o
‖R
c
).
The rule of thumb is to have more than 45° phase margin at the crossover frequency (G=1).
If C
OUT
is higher than 68µF, C
c1
= 2.2nF, and R
c
= 15KΩ are good choices for most applications. If the ESR zero
is too low to be cancelled by F
p2
, add C
c2
.
If the transient response to a step load is important, choose R
C
to be higher than 10kΩ.
EXTERNAL SCHOTTKY DIODE
A Schottky diode D
1
is recommended to prevent the intrinsic body diode of the low-side MOSFET from
conducting during the deadtime in PWM operation and hysteretic mode when both MOSFETs are off. If the body
diode turns on, there is extra power dissipation in the body diode because of the reverse-recovery current and
higher forward voltage; the high-side MOSFET also has more switching loss since the negative diode reverse-
recovery current appears as the high-side MOSFET turn-on current in addition to the load current. These losses
degrade the efficiency by 1-2%. The improved efficiency and noise immunity with the Schottky diode become
more obvious with increasing input voltage and load current.
The breakdown voltage rating of D
1
is preferred to be 25% higher than the maximum input voltage. Since D
1
is
only on for a short period of time, the average current rating for D
1
only requires being higher than 30% of the
maximum output current. It is important to place D
1
very close to the drain and source of the low-side MOSFET,
extra parasitic inductance in the parallel loop will slow the turn-on of D
1
and direct the current through the body
diode of the low-side MOSFET.
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