Datasheet

LM26480
www.ti.com SNVS543I –JANUARY 2008–REVISED MAY 2013
General Electrical Characteristics
(1)(2)(3)(4)(5)
Unless otherwise noted, V
IN
= 3.6V. Typical values and limits appearing in normal type apply for T
J
= 25°C. Limits appearing
in boldface type apply over the entire junction temperature range for operation, −40°C to +125°C.
Symbol Parameter Conditions Min Typ Max Units
I
Q
VINLDO12 Shutdown Current V
IN
= 3.6V 0.5 µA
V
POR
Power-On Reset Threshold V
DD
Falling Edge
(5)
1.9 V
T
SD
Thermal Shutdown Threshold
(4)
160 °C
T
SDH
Themal Shutdown Hysteresis
(4)
20 °C
Rising 2.9 V
UVLO Under Voltage Lock Out
Failing 2.7 V
(1) Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under
which operation of the device is speficied. Operating Ratings do not imply ensure performance limits. For performance limits and
associated test conditions, see the Electrical Characteristics.
(2) All voltages are with respect to the potential at the GND pin.
(3) Min and Max limits are specified by design, test, or statistical analysis. Typical numbers represent the most likely norm.
(4) Specified by design. Not production tested.
(5) VPOR is voltage at which the EPROM resets. This is different from the UVLO on VINLDO12, which is the voltage at which the
regulators shut off; and is also different from the nPOR function, which signals if the regulators are in a specified range.
Low Drop Out Regulators, LDO1 and LDO2
Unless otherwise noted, V
IN
= 3.6V, C
IN
= 1.0 µF, C
OUT
= 0.47 µF. Typical values and limits appearing in normal type apply for
T
J
= 25°C. Limits appearing in boldface type apply over the entire junction temperature range for operation, −40°C to
+125°C.
(1)(2)(3)(4)
Symbol Parameter Conditions Min Typ Max Units
V
IN
Operational Voltage Range VINLDO1 and VINLDO2 PMOS
1.74 5.5 V
pins
(5)
V
FB
FB Voltage Accuracy −3 3 %
Line Regulation V
IN
= (V
OUT
+ 0.3V) to 5.0V
0.15 %/V
(6)
Load Current = 1 mA
ΔV
OUT
Load Regulation V
IN
= 3.6V,
0.011 %/mA
Load Current = 1 mA to I
MAX
I
SC
Short Circuit Current Limit LDO1-2, V
OUT
= 0V 500 mA
V
IN
– V
OUT
Dropout Voltage Load Current = 50 mA
25 200 mV
(7)
PSRR Power Supply Ripple Rejection F = 10 kHz, Load Current = I
MAX
45 dB
θn Supply Output Noise 10 Hz < F < 100 kHz 150 µVrms
Quiescent Current “On” I
OUT
= 0 mA 40 150 µA
I
q
Quiescent Current “On” I
OUT
= 300 mA 60 200 µA
Quiescent Current “Off” EN is de-asserted 0.03 1 µA
T
ON
Turn On Time Start up from shut-down 300 µsec
Capacitance for stability 0°C ≤ T
J
0.33 0.47 µF
≤ 125°C
C
OUT
Output Capacitor −40°C ≤ T
J
≤ 125°C 0.68 1.0 µF
ESR (Equivalent Series
5 500 mΩ
Resistance)
(1) All voltages are with respect to the potential at the GND pin.
(2) Min and Max limits are specified by design, test, or statistical analysis. Typical numbers represent the most likely norm.
(3) C
IN
, C
OUT
: Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics.
(4) The device maintains a stable, regulated output voltage without a load.
(5) Pins 24, 19 can operate from V
IN
min of 1.74V to a V
IN
max of 5.5V. This rating is only for the series pass PMOS power FET. It allows
the system design to use a lower voltage rating if the input voltage comes from a buck output.
(6) V
IN
minimum for line regulation values is 1.8V.
(7) Dropout voltage is the voltage difference between the input and the output at which the output voltage drops to 100 mV below its
nominal value.
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