Datasheet

NPOR
RDY1
RDY2
0V
Case 1
t1
Counter
delay
t2
EN1
EN2
Counter
delay
EN1
0V
EN2
RDY1
RDY2
NPOR
EN1
t1
t2
t1 t2
EN2
RDY1
RDY2
Counter
delay
NPOR
Case 2
Case 3
LM26480
www.ti.com SNVS543I –JANUARY 2008–REVISED MAY 2013
Figure 28. NPOR with Counter Delay
The above diagram shows the simplest application of the Power-On Reset, where both switcher enables are tied
together. In Case 1, EN1 causes nPOR to transition LOW and triggers the nPOR delay counter. If the power
supply for Buck2 does not come on within that period, nPOR will stay LOW, indicating a power fail mode. Case 2
indicates the vice versa scenario if Buck1 supply did not come on. In both cases the nPOR remains LOW. Case
3 shows a typical application of the Power-On Reset, where both switcher enables are tied together. Even if
RDY1 ramps up slightly faster than RDY2 (or vice versa), the nPOR signal will trigger a programmable delay
before going HIGH, as explained below.
Copyright © 2008–2013, Texas Instruments Incorporated Submit Documentation Feedback 19
Product Folder Links: LM26480