Datasheet

m1
#
V
IN
R
DSON
L
(in V/s)
n = 1+
2mc
m1
(no unit)
Leff =
L
(D')
2
LM2622
SNVS068E –MAY 2000–REVISED MARCH 2013 www.ti.com
(16)
(17)
mc ≊ 0.072fs (in V/s) (18)
where
• V
IN
is the minimum input voltage
• R
DSON
is the value chosen from the graph "R
DSON
vs. V
IN
" in the Typical Performance Characteristics
section (19)
LAYOUT CONSIDERATIONS
The input bypass capacitor C
IN
, as shown in the typical operating circuit, must be placed close to the IC. This will
reduce copper trace resistance which effects input voltage ripple of the IC. For additional input voltage filtering, a
100nF bypass capacitor can be placed in parallel with C
IN
, close to the V
IN
pin, to shunt any high frequency noise
to ground. The output capacitor, C
OUT
, should also be placed close to the IC. Any copper trace connections for
the C
OUT
capacitor can increase the series resistance, which directly effects output voltage ripple. The feedback
network, resistors R
FB1
and R
FB2
, should be kept close to the FB pin, and away from the inductor, to minimize
copper trace connections that can inject noise into the system. Trace connections made to the inductor and
schottky diode should be minimized to reduce power dissipation and increase overall efficiency. For more detail
on switching power supply layout considerations see Application Note AN-1149: Layout Guidelines for Switching
Power Supplies (SNVA021).
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