Datasheet

(in Hz)
RHPzero =
V
OUT
(D')
2
2S,
LOAD
L
f
Z1
=
1
2SR
ESR
C
OUT
(in Hz)
f
P1
=
1
2S(R
ESR
+ R
L
)C
OUT
(in Hz)
LM2622
SNVS068E –MAY 2000–REVISED MARCH 2013 www.ti.com
DC GAIN AND OPEN-LOOP GAIN
Since the control stage of the converter forms a complete feedback loop with the power components, it forms a
closed-loop system that must be stabilized to avoid positive feedback and instability. A value for open-loop DC
gain will be required, from which you can calculate, or place, poles and zeros to determine the crossover
frequency and the phase margin. A high phase margin (greater than 45°) is desired for the best stability and
transient response. For the purpose of stabilizing the LM2622, choosing a crossover point well below where the
right half plane zero is located will ensure sufficient phase margin. A discussion of the right half plane zero and
checking the crossover using the DC gain will follow.
INPUT AND OUTPUT CAPACITOR SELECTION
The switching action of a boost regulator causes a triangular voltage waveform at the input. A capacitor is
required to reduce the input ripple and noise for proper operation of the regulator. The size used is dependant on
the application and board layout. If the regulator will be loaded uniformly, with very little load changes, and at
lower current outputs, the input capacitor size can often be reduced. The size can also be reduced if the input of
the regulator is very close to the source output. The size will generally need to be larger for applications where
the regulator is supplying nearly the maximum rated output or if large load steps are expected. A minimum value
of 10µF should be used for the less stressful condtions while a 22µF to 47µF capacitor may be required for
higher power and dynamic loads. Larger values and/or lower ESR may be needed if the application requires very
low ripple on the input source voltage.
The choice of output capacitors is also somewhat arbitrary and depends on the design requirements for output
voltage ripple. It is recommended that low ESR (Equivalent Series Resistance, denoted R
ESR
) capacitors be used
such as ceramic, polymer electrolytic, or low ESR tantalum. Higher ESR capacitors may be used but will require
more compensation which will be explained later on in the section. The ESR is also important because it
determines the peak to peak output voltage ripple according to the approximate equation:
ΔV
OUT
≊ 2Δi
L
R
ESR
(in Volts) (7)
A minimum value of 10µF is recommended and may be increased to a larger value. After choosing the output
capacitor you can determine a pole-zero pair introduced into the control loop by the following equations:
where
• R
L
is the minimum load resistance corresponding to the maximum load current (8)
(9)
The zero created by the ESR of the output capacitor is generally very high frequency if the ESR is small. If low
ESR capacitors are used it can be neglected. If higher ESR capacitors are used see the HIGH OUTPUT
CAPACITOR ESR COMPENSATION section.
RIGHT HALF PLANE ZERO
A current mode control boost regulator has an inherent right half plane zero (RHP zero). This zero has the effect
of a zero in the gain plot, causing an imposed +20dB/decade on the rolloff, but has the effect of a pole in the
phase, subtracting another 90° in the phase plot. This can cause undesirable effects if the control loop is
influenced by this zero. To ensure the RHP zero does not cause instability issues, the control loop should be
designed to have a bandwidth of less than ½ the frequency of the RHP zero. This zero occurs at a frequency of:
where
• I
LOAD
is the maximum load current (10)
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