Datasheet

I
Sleep
=
I
min
+ 0.23 P
Vin - Vout
L
2
x
fsw x L
D x 2 x (Vin ± Vout)
Vout
50 mV/Div
V
SW
5V/Div
IL
400 mA/Div
100 Ps/DIV
1 Ps/DIV
Vout
10 mV/Div
IL
500 mA/Div
ID
1A/Div
V
SW
5V/Div
LM26003
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SNVS576D AUGUST 2008REVISED MARCH 2013
OPERATION DESCRIPTION
GENERAL
The LM26003 is a current mode PWM buck regulator. At the beginning of each clock cycle, the internal high-side
switch turns on, allowing current to ramp-up in the inductor. The inductor current is internally monitored during
each switching cycle. A control signal derived from the inductor current is compared to the voltage control signal
at the COMP pin, derived from the feedback voltage. When the inductor current reaches its threshold, the high-
side switch is turned off and inductor current ramps-down. While the switch is off, inductor current is supplied
through the catch diode. This cycle repeats at the next clock cycle. In this way, duty-cycle and output voltage are
controlled by regulating inductor current. Current mode control provides superior line and load regulation. Other
benefits include cycle-by-cycle current limiting and a simplified compensation scheme. Typical PWM waveforms
are shown in Figure 13.
Figure 13. PWM Waveforms 1A Load, Vin = 12V
SLEEP MODE
In light load conditions, the LM26003 automatically switches into sleep mode for improved efficiency. As loading
decreases, the voltage at FB increases and the COMP voltage decreases. When the COMP voltage reaches the
0.6V (typical) clamp threshold and the FB voltage rises 1% above nominal, sleep mode is enabled and switching
stops. The regulator remains in sleep mode until the FB voltage falls to the reset threshold, at which point
switching resumes. This 1% FB window limits the corresponding output ripple requirement to approximately 1%
of nominal output voltage. The sleep cycle will repeat until load current is increased. Figure 14 shows typical
switching and output voltage waveforms in sleep mode.
Figure 14. Sleep Mode Waveforms 25 mA Load, Vin = 12V
In sleep mode, quiescent current is reduced to less than 40 µA (typical) when not switching. The DC sleep mode
threshold can roughly be calculated according to the equation below:
(1)
Where Imin = Ilim/16 (4.7A/16 typically) and D = duty-cycle, defined as (Vout + Vdiode)/Vin.
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