Datasheet

SYNC

10k

DEADTIME

ONE-SHOT

2.5V

I = f(RT)

SYNC

LM25575

UP TO 5 TOTAL

DEVICES

LM25575

SYNC

AGND

LM25575

CLK

SYNC

500 ns

LM25575, LM25575-Q1

www.ti.com

SNVS479G –JANUARY 2007–REVISED APRIL 2013

Figure 3. Sync from External Clock

Figure 4. Sync from Multiple Devices

Multiple LM25575 devices can be synchronized together simply by connecting the SYNC pins together. In this

configuration all of the devices will be synchronized to the highest frequency device. The diagram in Figure 5

illustrates the SYNC input/output features of the LM25575. The internal oscillator circuit drives the SYNC pin with

a strong pull-down / weak pull-up inverter. When the SYNC pin is pulled low either by the internal oscillator or an

external clock, the ramp cycle of the oscillator is terminated and a new oscillator cycle begins. Thus, if the SYNC

pins of several LM25575 IC’s are connected together, the IC with the highest internal clock frequency will pull the

connected SYNC pins low first and terminate the oscillator ramp cycles of the other IC’s. The LM25575 with the

highest programmed clock frequency will serve as the master and control the switching frequency of the all the

devices with lower oscillator frequency.

Figure 5. Simplified Oscillator Block Diagram and SYNC I/O Circuit

Product Folder Links: LM25575 LM25575-Q1