Datasheet

1
2
¸
¹
·
¨
©
§
8 x 230 kHz x 680 PF
'
V
OUT
= 1.9 x 0.01:
2
+
=19 mV
1
2
¸
¹
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§
8 x x C
OUT
f
SW
'
V
OUT
= I
PP
x R
ESR
2
+
[V]
C
HB
Q
g
'V
HB
t
[F]
LM25117
LM25117-Q1
SNVS714E –APRIL 2011–REVISED MARCH 2013 www.ti.com
SNUBBER COMPONENTS R
SNB
AND C
SNB
A resistor-capacitor snubber network across the low-side NMOS device reduces ringing and spikes at the
switching node. Excessive ringing and spikes can cause erratic operation and can couple noise to the output
voltage. Selecting the values for the snubber is best accomplished through empirical methods. First, make sure
the lead lengths for the snubber connections are very short. Start with a resistor value between 5 and 50Ω.
Increasing the value of the snubber capacitor results in more damping, but higher snubber losses. Select a
minimum value for the snubber capacitor that provides adequate damping of the spikes on the switch waveform
at heavy load. A snubber may not be necessary with an optimized layout.
BOOTSTRAP CAPACITOR C
HB
AND BOOTSTRAP DIODE D
HB
The bootstrap capacitor between the HB and SW pin supplies the gate current to charge the high-side NMOS
device gate during each cycle’s turn-on and also supplies recovery charge for the bootstrap diode. These current
peaks can be several amperes. The recommended value of the bootstrap capacitor is at least 0.1μF. C
HB
should
be a good quality, low ESR, ceramic capacitor located at the pins of the IC to minimize potentially damaging
voltage transients caused by trace inductance. The absolute minimum value for the bootstrap capacitor is
calculated as:
(42)
Where Qg is the high-side NMOS gate charge and ΔV
HB
is the tolerable voltage droop on C
HB
, which is typically
less than 5% of VCC or 0.15V conservatively. A value of 0.47μF was selected for this design.
VCC CAPACITOR C
VCC
The primary purpose of the VCC capacitor (C
VCC
) is to supply the peak transient currents of the LO driver and
bootstrap diode as well as provide stability for the VCC regulator. These peak currents can be several amperes.
The recommended value of C
VCC
should be no smaller than 0.47μF, and should be a good quality, low ESR,
ceramic capacitor. C
VCC
should be placed at the pins of the IC to minimize potentially damaging voltage
transients caused by trace inductance. A value of 1μF was selected for this design.
OUTPUT CAPACITOR C
O
The output capacitors smooth the output voltage ripple caused by inductor ripple current and provide a source of
charge during transient loading conditions. For this design example, a 680μF electrolytic capacitor with maximum
10mΩ ESR was selected as the main output capacitor. The fundamental component of the output ripple voltage
with maximum ESR is approximated as:
(43)
(44)
Additional low ERS / ESL ceramic capacitors can be placed in parallel with the main output capacitor to further
reduce the output voltage ripple and spikes. In this example, two 22μF capacitors were added.
INPUT CAPACITOR C
IN
The regulator input supply voltage typically has high source impedance at the switching frequency. Good quality
input capacitors are necessary to limit the ripple voltage at the VIN pin while supplying most of the switch current
during the on-time. When the high-side NMOS device turns on, the current into the device steps to the valley of
the inductor current waveform, ramps up to the peak value, and then drops to the zero at turnoff. The input
capacitor should be selected for RMS current rating and minimum ripple voltage. A good approximation for the
required ripple current rating necessary is I
RMS
> I
OUT
/ 2.
In this example, seven 2.2μF ceramic capacitors were used. With ceramic capacitors, the input ripple voltage will
be triangular. The input ripple voltage can be approximated as:
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