Datasheet

R
S
=
V
CS(TH)
I
OUT
-
V
OUT
x T
2 x L
+
1 -
V
OUT
V
IN(MIN)
V
OUT
x T
L
x
C
RAMP
=
g
m
x L
A x R
S
x
1 +
5 - V
OUT
V
IN(MAX)
R
S
=
V
CS(TH)
I
OUT
-
V
OUT
x T
2 x L
x
+
1 -
V
OUT
V
IN(MIN)
V
OUT
x T
L
1 +
5 - V
OUT
V
IN(MAX)
1 +
5 - V
OUT
V
IN(MIN)
x
LM25116
www.ti.com SNVS509D –APRIL 2007–REVISED FEBRUARY 2013
If a network analyzer is available, the modulator gain can be measured and the error amplifier gain can be
configured for the desired loop transfer function. If a network analyzer is not available, the error amplifier
compensation components can be designed with the guidelines given. Step load transient tests can be
performed to verify acceptable performance. The step load goal is minimum overshoot with a damped response.
C
HF
can be added to the compensation network to decrease noise susceptibility of the error amplifier. The value
of C
HF
must be sufficiently small since the addition of this capacitor adds a pole in the error amplifier transfer
function. This pole must be well beyond the loop crossover frequency. A good approximation of the location of
the pole added by C
HF
is: f
P2
= f
ZEA
x C
COMP
/ C
HF
. The value of C
HF
was selected as 100 pF for the design
example.
PCB LAYOUT AND THERMAL CONSIDERATIONS
In a buck regulator the primary switching loop consists of the input capacitor, MOSFETs and current sense
resistor. Minimizing the area of this loop reduces the stray inductance and minimizes noise and possible erratic
operation. The input capacitor should be placed as close as possible to the MOSFETs, with the VIN side of the
capacitor connected directly to the high-side MOSFET drain, and the GND side of the capacitor connected as
close as possible to the low-side source or current sense resistor ground connection. A ground plane in the PC
board is recommended as a means to connect the quiet end (input voltage ground side) of the input filter
capacitors to the output filter capacitors and the PGND pin of the regulator. Connect all of the low power ground
connections (C
SS
, R
T
, C
RAMP
) directly to the regulator AGND pin. Connect the AGND and PGND pins together
through to a topside copper area covering the entire underside of the device. Place several vias in this underside
copper area to the ground plane.
The highest power dissipating components are the two power MOSFETs. The easiest way to determine the
power dissipated in the MOSFETs is to measure the total conversion losses (P
IN
- P
OUT
), then subtract the power
losses in the output inductor and any snubber resistors. The resulting power losses are primarily in the switching
MOSFETs.
If a snubber is used, the power loss can be estimated with an oscilloscope by observation of the resistor voltage
drop at both turn-on and turn-off transitions. Assuming that the RC time constant is << 1 / f
SW
.
P = C x V
2
x f
SW
(35)
The regulator has an exposed thermal pad to aid power dissipation. Selecting MOSFETs with exposed pads will
aid the power dissipation of these devices. Careful attention to R
DS(ON)
at high temperature should be observed.
Also, at 250 kHz, a MOSFET with low gate capacitance will result in lower switching losses.
Comprehensive Equations
CURRENT SENSE RESISTOR AND RAMP CAPACITOR
T = 1 / f
SW
, g
m
= 5 µA/V, A = 10 V/V. I
OUT
is the maximum output current at current limit.
General Method for V
OUT
< 5V:
(36)
(37)
General Method for 5V < V
OUT
< 7.5V:
(38)
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