Datasheet

LM25116
www.ti.com SNVS509D –APRIL 2007–REVISED FEBRUARY 2013
turns on before the MOSFET itself, minimizing the voltage from drain to source before turn-on. For this
example, the maximum drain-to-source voltage applied to either MOSFET is 42V. VCC provides the drive
voltage at the gate of the MOSFETs. The selected MOSFETs must be able to withstand 42V plus any ringing
from drain to source, and be able to handle at least VCC plus ringing from gate to source. A good choice of
MOSFET for the 42V input design example is the Si7850DP. It has an R
DS(ON)
of 20 mΩ, total gate charge of
14 nC, and rise and fall times of 10 ns and 12 ns respectively. In applications where a high step-down ratio is
maintained for normal operation, efficiency may be optimized by choosing a high-side MOSFET with lower Q
g
,
and low-side MOSFET with lower R
DS(ON)
. (32)
For higher voltage MOSFETs which are not true logic level, it is important to use the UVLO feature. Choose a
minimum operating voltage which is high enough for VCC and the bootstrap (HB) supply to fully enhance the
MOSFET gates. This will prevent operation in the linear region during power-on or power-off which can result in
MOSFET failure. Similar consideration must be made when powering VCCX from the output voltage. For the
high-side MOSFET, the gate threshold should be considered and careful evaluation made if the gate threshold
voltage exceeds the HO driver UVLO.
MOSFET SNUBBER
A resistor-capacitor snubber network across the low-side MOSFET reduces ringing and spikes at the switching
node. Excessive ringing and spikes can cause erratic operation and couple spikes and noise to the output.
Selecting the values for the snubber is best accomplished through empirical methods. First, make sure the lead
lengths for the snubber connections are very short. Start with a resistor value between 5Ω and 50Ω. Increasing
the value of the snubber capacitor results in more damping, but higher snubber losses. Select a minimum value
for the snubber capacitor that provides adequate damping of the spikes on the switch waveform at high load.
ERROR AMPLIFIER COMPENSATION
R
COMP
, C
COMP
and C
HF
configure the error amplifier gain characteristics to accomplish a stable voltage loop gain.
One advantage of current mode control is the ability to close the loop with only two feedback components, R
COMP
and C
COMP
. The voltage loop gain is the product of the modulator gain and the error amplifier gain. For the 5V
output design example, the modulator is treated as an ideal voltage-to-current converter. The DC modulator gain
of the LM25116 can be modeled as:
DC Gain
(MOD)
= R
LOAD
/ (A x R
S
) (33)
The dominant low frequency pole of the modulator is determined by the load resistance (R
LOAD
) and output
capacitance (C
OUT
). The corner frequency of this pole is:
f
P(MOD)
= 1 / (2π x R
LOAD
x C
OUT
) (34)
For R
LOAD
= 5V / 7A = 0.714Ω and C
OUT
= 320 µF (effective) then f
P(MOD)
= 700 Hz
DC Gain
(MOD)
= 0.714Ω / (10 x 10 mΩ) = 7.14 = 17 dB
For the 5V design example the modulator gain vs. frequency characteristic was measured as shown in Figure 36.
Figure 36. Modulator Gain and Phase
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