Datasheet

-60
-40
-20
0
20
40
60
1.E+02
1.E+03
1.E+04 1.E+05
1.E+06
FREQUENCY (Hz)
GAIN (dB)
-200
-160
-120
-80
-40
0
40
80
PHASE (
o
)
120
160
200
-60
-40
-20
0
20
40
60
1.E+01
1.E+02
1.E+03 1.E+04
1.E+05
FREQUENCY (Hz)
GAIN (dB)
-200
-160
-120
-80
-40
0
40
80
PHASE (°)
120
160
200
LM25088
LM25088-Q1
SNVS609H –DECEMBER 2008–REVISED MARCH 2013 www.ti.com
Figure 25. Modular Gain Phase
Components R
COMP
and C
COMP
configure the error amplifier as a type II compensation configuration. The DC
gain of the amplifier is 80dB which has a pole at low frequency and a zero at F
Zero
= 1/(2π x R
COMP
x C
COMP
).
The error amplifier zero is set such that it cancels the modulator pole leaving a single pole response at the
crossover frequency of the voltage loop. A single pole response at the crossover frequency yields a very stable
loop with 90° of phase margin. For the design example, a target loop bandwidth (crossover frequency) of 15 kHz
was selected. The compensation network zero (F
Zero
) should be at least an order of magnitude lower than the
target crossover frequency. This constrains the product of R
COMP
and C
COMP
for a desired compensation network
zero 1/ (2π x R
COMP
x C
COMP
) to be less than 1.5 kHz. Increasing R
COMP
, while proportionally decreasing C
COMP
,
decreases the error amp gain. For the design example C
COMP
was selected to be 0.015 µF and R
COMP
was
selected to be 18 kΩ. These values configure the compensation network zero at 0.6 kHz. The error amp gain at
frequencies greater than F
Zero
is R
COMP
/R
FB2
, which is approximately 3.56 (11dB).
Figure 26. Error Amplifier Gain and Phase
The overall voltage loop gain can be predicted as the sum (in dB) of the modulator gain and the error amp gain.
If a network analyzer is available, the modulator gain can be measured and the error amplifier gain can be
configured for the desired loop transfer function. If a network analyzer is not available, the error amplifier
compensation components can be designed with the suggested guidelines. Step load transient tests can be
performed to verify performance. The step load goal is minimum overshoot with a damped response. C
HF
can be
added to the compensation network to decrease noise susceptibility of the error amplifier. The value of C
HF
must
be sufficiently small since the addition of this capacitor adds a pole in the error amplifier transfer function. A good
approximation of the location of the pole added by C
HF
is F
P2
= F
Zero
x C
COMP
/ C
HF
. Using C
HF
is recommended to
minimize coupling of any switching noise into the modulator. The value of C
HF
was selected as 100 pF for this
design example.
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