Datasheet

LM25085, LM25085-Q1
www.ti.com SNVS593H –OCTOBER 2008–REVISED MARCH 2013
A 33µF electrolytic capacitor is selected for C
IN
, and a 1µF ceramic capacitor is selected for C
BYP
. Due to the
ESR of C
IN
, the ripple at VIN will likely be higher than the calculation indicates, and therefore it may be
desirable to increase C
IN
to 47µF or 68µF. C
BYP
must be located as close as possible to the VIN and GND
pins of the LM25085. The voltage rating for both capacitors must be at least 42V. The RMS ripple current
rating for the input capacitors must also be considered. A good approximation for the required ripple current
rating is I
RMS
> I
OUT
/2.
• D1: A Schottky diode is recommended. Ultra-fast recovery diodes are not recommended as the high speed
transitions at the SW pin may affect the regulator’s operation due to the diode’s reverse recovery transients.
The diode must be rated for the maximum input voltage, and the worst case current limit level. The average
power dissipation in the diode is calculated from:
P
D1
= V
F
x I
OUT
x (1-D)
where V
F
is the diode’s forward voltage drop, and D is the on-time duty cycle. Using Equation 1, the minimum
duty cycle occurs at maximum input voltage, and is calculated to be ≊11.9% in this example. The diode power
dissipation calculates to be:
P
D1
= 0.65V x 5A x (1- 0.119) = 2.86W
• C
VCC
: The capacitor at the VCC pin (from VIN to VCC) provides not only noise filtering and stability for the
VCC regulator, but also provides the surge current for the PFET gate drive. The typical recommended value
for C
VCC
is 0.47µF. A good quality, low ESR, ceramic capacitor is recommended. C
VCC
must be located as
close as possible to the VIN and VCC pins. If the selected PFET has a Total Gate Charge specification of
100nC or larger, or if the circuit is required to operate at input voltages below 7V, a larger capacitor may be
required. The maximum recommended value for C
VCC
is 1µF.
• IC Power Dissipation: The maximum power dissipated in the LM25085 package is calculated using
Equation 12 at the maximum input voltage. The Total Gate Charge for the Si7465 PFET is specified to be
40nC (max) in its data sheet. Therefore the total power dissipation within the LM25085 is calculated to be:
P
DISS
= 42V x ((40nC x 300kHz) + 1.3mA) = 559mW
Using an HVSSOP-PowerPAD-8 package with a θ
JA
of 46°C/W produces a temperature rise of 26°C from
junction to ambient.
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