Datasheet

C
IN
+ C
BYP
=
I
OUT(max)
x t
ON(max)
'V
= 25.5 PF
5A x 2.55 Ps
0.5V
=
R3 x C1 =
(7V - 4.81V) x 2.55 Ps
0.025V
= 2.23 x 10
-4
R3 x C1 =
(V
IN(min)
- V
A
) x t
ON
'V
C
OUT
=
1.08A
8 x 300 kHz x 0.005V
= 90 PF
C
OUT
=
I
OR(max)
8 x F
S
x V
RIPPLE
I
CL(min)
=
0.01:
(2.1 k: x 32 PA) - 9 mV
= 5.82A
I
CL(max)
=
0.01:
(2.1 k: x 48 PA) + 9 mV
= 11A
LM25085, LM25085-Q1
SNVS593H –OCTOBER 2008–REVISED MARCH 2013 www.ti.com
Using the tolerances for the ADJ pin current and the current limit comparator offset, the maximum current limit
threshold calculates to:
The minimum current limit thresholds calculate to:
The load current in each case is equal to the current limit threshold minus half the current ripple amplitude.
The recommended value of 1000pF for C
ADJ
is used in this example.
• C
OUT
: Since the maximum allowed output ripple voltage is very low in this example (5mVp-p), the minimum
ripple configuration (R3, C1, and C2 in the Block Diagram) must be used. The resulting ripple at V
OUT
is then
due to the inductor’s ripple current passing through C
OUT
. This capacitor’s value can be selected based on the
maximum allowable ripple voltage at V
OUT
, or based on transient response requirements. The following
calculation, based on ripple voltage, provides a first order result for the value of C
OUT
:
where I
OR(max)
is the maximum ripple current calculated above, and V
RIPPLE
is the allowable ripple at V
OUT
.
• R3, C1, C2: The minimum ripple configuration uses these three components to generate the ripple voltage
required at the FB pin since there is insufficient ripple at V
OUT
. A minimum of 25mVp-p must be applied to the
FB pin to obtain stable constant frequency operation. R3 and C1 are selected to generate a sawtooth
waveform at their junction, and that waveform is AC coupled to the FB pin via C2. The values of the three
components are determined using the following procedure:
A 100µF capacitor is selected. Typically the ripple amplitude will be higher than the calculations indicate due
to the capacitor’s ESR.
Calculate V
A
= V
OUT
- (V
SW
x (1 – (V
OUT
/V
IN(min)
)))
where V
SW
is the absolute value of the voltage at the SW node during the off-time, typically 0.5V to 1V
depending on the diode D1. Using a typical value of 0.65V, V
A
calculates to 4.81V. V
A
is the nominal DC
voltage at the R3/C1 junction, and is used in the next equation:
where t
ON
is the maximum on-time (at minimum input voltage, and ΔV is the desired ripple amplitude at the
R3/C1 junction, typically 25mVp-p.
R3 and C1 are then selected from standard value components to produce the product calculated above.
Typical values for C1 are 3000pF to 10,000pF, and R3 is typically from 10kΩ to 300kΩ. C2 is then chosen
large compared to C1, typically 0.1µF. For this example, 3300pF is chosen for C1, requiring R3 to be 67.7kΩ.
A standard value 66.5kΩ resistor is selected.
• C
IN
, C
BYP
: These capacitors limit the voltage ripple at VIN by supplying most of the switch current during the
on-time. At maximum load current, when Q1 is switched on, the current through Q1 suddenly increases to the
lower peak of the inductor’s ripple current, then ramps up to the upper peak, and then drops to zero at turn-
off. The average current during the on-time is the load current. For a worst case calculation, these capacitors
must supply this average load current during the maximum on-time, while limiting the voltage drop at VIN. For
this example, 0.5V is selected as the maximum allowable droop at VIN. Their minimum value is calculated
from:
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