Datasheet

V
IN
x t
ON
t
OFF
V
FD
+ V
ESR
t
'I =
(V
OUT
+ V
FD
+ V
ESR
) x t
OFF
L
'I =
(V
IN
- V
OUT
) x t
ON
L
LM25085, LM25085-Q1
SNVS593H –OCTOBER 2008–REVISED MARCH 2013 www.ti.com
I
CL
= 40µA x R
ADJ
/R
SEN
(7)
When using Equation 6 or Equation 7, the tolerances for the ADJ pin current sink and the offset of the current
limit comparator should be included to ensure the resulting minimum current limit is not less than the required
maximum switch current. Simultaneously increasing the values of R
ADJ
and R
SEN
decreases the effects of the
current limit comparator offset, but at the expense of higher power dissipation. When using a sense resistor, the
R
SEN
resistor value should be chosen within the practical limitations of power dissipation and physical size. For
example, for a 10A current limit, setting R
SEN
= 0.005Ω results in a power dissipation as high as 0.5W. Current
sense connections to the R
SEN
resistor, or to Q1, must be Kelvin connections to ensure accuracy.
The C
ADJ
capacitor filters noise from the ADJ pin, and helps prevent unintended switching of the current limit
comparator due to input voltage transients. The recommended value for C
ADJ
is 1000pF.
CURRENT LIMIT OFF-TIME
When the current through Q1 exceeds the current limit threshold, the LM25085 forces an off-time longer than the
normal off-time defined by Equation 1. See Figure 10 or calculate the current limit off-time from the following
equation:
where
• V
IN
is the input voltage
• V
FB
is the voltage at the FB pin at the time current limit was detected (8)
This feature is necessary to allow the inductor current to decrease sufficiently to offset the current increase which
occurred during the on-time. During the on-time, the inductor current increases an amount equal to:
(9)
During the off-time the inductor current decreases due to the reverse voltage applied across the inductor by the
output voltage, the freewheeling diode’s forward voltage (V
FD
), and the voltage drop due to the inductor’s series
resistance (V
ESR
). The current decrease is equal to:
(10)
The on-time in Equation 9 is shorter than the normal on-time since the PFET is shut off when the current limit
threshold is crossed. If the off-time is not long enough, such that the current decrease (Equation 10) is less than
the current increase (Equation 9), the current levels are higher at the start of the next on-time. This results in a
further decrease in on-time, since the current limit threshold is crossed sooner. A balance is reached when the
current changes in Equation 9 and Equation 10 are equal. The worst case situation is that of a direct short circuit
at the output terminals, where V
OUT
= 0V, as that results in the largest current increase during the on-time, and
the smallest decrease during the off-time. The sum of the diode’s forward voltage and the inductor’s ESR voltage
must be sufficient to ensure current runaway does not occur. Using Equation 9 and Equation 10, this requirement
can be stated as:
(11)
For t
ON
in Equation 11 use the minimum on-time at the SW node. To determine this time period add the
“Minimum on-time in current limit” specified in Electrical Characteristics (t
ON
-4) to the difference of the turn-off
and turn-on delays of the PFET. For t
OFF
use the value in Figure 10 or use Equation 8, where V
FB
is equal to
zero volts. When using the minimum or maximum limits of those specifications to determine worst case
situations, the tolerance of the minimum on-time (t
ON
-4) and the current limit off-times (t
OFF(CL1)
through t
OFF(CL4)
)
track each other over the process and temperature variations. A device which has an on-time at the high end of
the range will have an off-time that is at the high end of its range.
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