Datasheet

GND
PGD
R
PG
LM25061
V
PGD
Power
Good
V
PGDL
= 1.17V + [R3 x
R4
(1.17V - 22 PA)]
V
PGDH
=
1.17V x (R3 + R4)
R4
R4 =
(V
PGDH
- 1.17V)
1.17V x R3
R3 =
V
PGDH
- V
PGDL
22 PA
=
V
PGD(HYS)
22 PA
Q1
OUT
FB
GND
R3
1.17V
22 PA
LM25061
R4
PGD
SENSE
V
OUT
from UVLO
LM25061
www.ti.com SNVS611E –FEBRUARY 2011–REVISED MARCH 2013
POWER GOOD and FB PINS
During turn-on, the Power Good pin (PGD) is high until the voltage at VIN increases above ≊1.6V. PGD then
switches low, remaining low as the VIN voltage increases. When the voltage at the FB pin increases above its
threshold PGD switches high. PGD switches low when the voltage at the FB pin is below the programmed
threshold, or if the UVLO pin is taken below its threshold. Setting the output threshold for the PGD pin requires
two resistors (R3, R4) as shown in Figure 33. While monitoring the output voltage is shown in Figure 33 , R3 can
be connected to any other voltage which requires monitoring.
Figure 33. Programming the PGD Threshold
The resistor values are calculated as follows:
• Choose the upper and lower threshold (V
PGDH
) and (V
PGDL
) at V
OUT
.
(17)
(18)
As an example, assume the application requires the following thresholds: V
PGDH
= 11V, and V
PGDL
= 10.5V.
Therefore V
PGD(HYS)
= 0.5V. The resistor values are:
R3 = 22.7 kΩ, R4 = 2.68 kΩ (19)
Where the R3 and R4 resistor values are known, the threshold voltages and hysteresis are calculated from the
following:
(20)
(21)
V
PGD(HYS)
= R3 x 22 µA (22)
A pull-up resistor is required at PGD as shown in Figure 34. The pull-up voltage (V
PGD
) can be as high as 17V,
and can be higher or lower than the voltages at VIN and OUT.
Figure 34. Power Good Output
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