Datasheet

t
ON
=
V
SYS
x C
L
I
LIM
V
SENSE
= I
L
x R
S
=
R
PWR
2.32 x 10
5
x V
DS
R
S
x P
FET(LIM)
V
DS
=
LM25061
SNVS611E –FEBRUARY 2011–REVISED MARCH 2013 www.ti.com
POWER LIMIT THRESHOLD
The LM25061 determines the power dissipation in the external MOSFET (Q1) by monitoring the drain current
(the current in R
S
), and the V
DS
of Q1 (SENSE to OUT pins). The resistor at the PWR pin (R
PWR
) sets the
maximum power dissipation for Q1, and is calculated from the following equation:
R
PWR
= 2.32 x 10
5
x R
S
x P
FET(LIM)
where
• P
FET(LIM)
is the desired power limit threshold for Q1
• R
S
is the current sense resistor described in the Current Limit section (2)
For example, if R
S
is 10 mΩ , and the desired power limit threshold is 20W, R
PWR
calculates to 46.4 kΩ. If Q1’s
power dissipation reaches the threshold Q1’s gate is modulated to regulate the load current, keeping Q1’s power
from exceeding the threshold. For proper operation of the power limiting feature, R
PWR
must be ≤150 kΩ. While
the power limiting circuit is active, the fault timer is active as described in the Fault Timer & Restart section.
Typically, power limit is reached during startup, or if the output voltage falls due to a severe overload or short
circuit.
The programmed maximum power dissipation should have a reasonable margin from the maximum power
defined by the FET's SOA chart if the LM25061-2 is used since the FET will be repeatedly stressed during fault
restart cycles. The FET manufacturer should be consulted for guidelines.
If the application does not require use of the power limit function the PWR pin can be left open.
The accuracy of the power limit function at turn-on may degrade if a very low value power dissipation limit is set.
The reason for this caution is that the voltage across the sense resistor, which is monitored and regulated by the
power limit circuit, is lowest at turn-on when the regulated current is at minimum. The voltage across the sense
resistor during power limit can be expressed as follows:
where
• IL is the current in R
S
• V
DS
is the voltage across Q1 (3)
For example, if the power limit is set at 20W with R
S
= 10 mohms, and V
DS
= 15V the sense resistor voltage
calculates to 13.3 mV, which is comfortably regulated by the LM25061. However, if a lower power limit is set
lower (e.g., 2W), the sense resistor voltage calculates to 1.33 mV. At this low level noise and offsets within the
LM25061 may degrade the power limit accuracy. To maintain accuracy, the sense resistor voltage should not be
less than 5 mV.
TURN-ON TIME
The output turn-on time depends on whether the LM25061 operates in current limit, or in both power limit and
current limit, during turn-on.
A) Turn-on with current limit only: The current limit threshold (I
LIM
) is determined by the current sense resistor
(R
S
). If the current limit threshold is less than the current defined by the power limit threshold at maximum V
DS
the circuit operates at the current limit threshold only during turn-on. Referring to Figure 30a, as the load current
reaches I
LIM
, the gate-to-source voltage is controlled at V
GSL
to maintain the current at I
LIM
. As the output voltage
reaches its final value, (V
DS
≊ 0V) the drain current reduces to its normal operating value. The time for the OUT
pin voltage to transition from zero volts to V
SYS
is equal to:
where
• C
L
is the load capacitance (4)
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