Datasheet

LM25037, LM25037-Q1
SNVS572D –JULY 2008–REVISED MARCH 2013 www.ti.com
GATE DRIVER OUTPUTS (OUTA & OUTB)
The LM25037 provides two alternating gate driver outputs, OUTA and OUTB. The internal gate drivers can each
source and sink 1.2A peak each. The maximum duty cycle is inherently limited to less than 50% and is based on
the value of RT2 resistor. As an example, if the COMP pin is in a high state, RT1 = 15K and RT2 = 20K then the
outputs will operate at maximum duty cycle of 96%.
THERMAL PROTECTION
Internal Thermal Shutdown circuitry is provided to protect the integrated circuit in the event the maximum rated
junction temperature is exceeded. When activated, typically at 165°C, the controller is forced into a low power
standby state with the output drivers (OUTA and OUTB) and the bias regulators (VCC and REF) disabled. This
helps to prevent catastrophic failures from accidental device overheating. During thermal shutdown, the soft-start
capacitor is fully discharged and the controller follows a normal start-up sequence after the junction temperature
falls to the operating level (140°C).
APPLICATION INFORMATION
The following information is intended to provide guidelines for the design process when applying the LM25037.
TOPOLOGY and CONTROL ALGORITHM CHOICE
The LM25037 has all the features required to implement double-ended power converter topologies such as push-
pull, half-bridge and full-bridge with minimum external components. One key feature is the flexibility in control
algorithm selection, i.e., the LM25037 can be used to implement either voltage mode control or current mode
control. Designers familiar with these topologies recognize that conventionally, current mode control is used for
push-pull and full-bridge topologies while voltage mode control is required for the half-bridge topology. In limited
applications, voltage mode control can be used for push-pull and full-bridge topologies as well, with special care
to maintain flux balance, such as using a dc-blocking capacitor in the primary (full-bridge). The goal of this
section is to illustrate implementation of both current mode control and voltage mode control using the LM25037
and aid the designer in the design process.
VOLTAGE MODE CONTROL USING THE LM25037
An external resistor (R
FF
) and capacitor (C
FF
) connected to VIN, AGND, and the RAMP pins is required to create
a saw-tooth modulation ramp signal shown in Figure 21. The slope of the signal at RAMP will vary in proportion
to the input line voltage. The varying slope provides line feed-forward information necessary to improve line
transient response with voltage mode control. With a constant error signal, the on-time (t
ON
) varies inversely with
the input voltage (VIN) to stabilize the Volt • Second product of the transformer primary. Using a line feed-forward
ramp for PWM control requires very little change in the voltage regulation loop to compensate for changes in
input voltage, as compared to a fixed slope oscillator ramp. Furthermore, voltage mode control is less susceptible
to noise and does not require leading edge filtering, and is therefore a good choice for wide input range power
converters. Voltage mode control requires a more complicated compensation network, due to the complex-
conjugate poles of the L-C output filter.
In push-pull and full-bridge topologies, any asymmetry in the volt-second product applied to primary in one phase
may not be cancelled by subsequent phase, possibly resulting in a dc current build-up in the transformer, which
pushes the transformer core towards saturation. Special care in the transformer design, such as gapping the
core, or adding ballasting resistance in the primary is required to rectify this imbalance when using voltage mode
control with these topologies. Current mode control naturally corrects for any volt-second asymmetry in the
primary.
The recommended capacitor value range for C
FF
is 100 pF to 1500 pF. Referring to Figure 21, it can be seen
that value C
FF
must be small enough such that the capacitor can be discharged within the clock (CLK) pulse
width each cycle. The CLK pulse width is same as the dead-time set by RT2. The minimum possible dead-time
for LM25037 is 50 ns and the internal discharge FET R
DS(ON)
is 5Ω (typical),
The value of R
FF
required can be calculated from
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