Datasheet

R
1
V
IN (UVLO,rising)
= 1.225V x
R
7
+1
¹
·
©
§
V
IN(HYS)
=
I
HYS
R
1
T
ON
=
V
IN
10
-10
x R2
Theory of Operation www.ti.com
2 Theory of Operation
When the circuit is in regulation, the buck switch is turned on each cycle for a time determined by R3 and
V
IN
according to Equation 1:
(1)
The on-time of this evaluation board ranges from 2.39 µs at V
IN
= 12 V to 493 ns at V
IN
= 48 V. The on-
time varies inversely with input voltage. At the end of each on-time, the buck switch is off for at least 144
ns. In normal operation, the off-time is much longer. During the off-time, the load current is supplied by the
output capacitor (C6). When the output voltage falls sufficiently that the voltage at FB is below 1.225 V,
the regulation comparator initiates a new on-time period. For stable, fixed frequency operation, a minimum
of 25 mV of ripple is required at FB to switch the regulation comparator. For a more detailed block
diagram and a complete description of the various functional blocks, see the LM25019 48V, 100mA
Constant On-Time Synchronous Buck Regulator Data Sheet (SNVS952).
3 UVLO
The UVLO resistors (R1, R7) are selected using Equation 2:
(2)
and Equation 3:
(3)
On this evaluation board, R1 = 127 kΩ and R7 = 14.0 kΩ, resulting in UVLO rising threshold at V
IN
= 12 V
and a hysteresis of 2.5 V.
4 Board Connection and Start-up
The input connections are made to J2. The load is connected to J1. Ensure the wires are adequately
sized for the intended load current. Before start-up, a voltmeter should be connected to the input and
output terminals. The load current should be monitored with an ammeter or a current probe. It is
recommended that the input voltage be increased gradually to 12 V, at which time the output voltage
should be 10 V. If the output voltage is correct, increase the input voltage as desired and proceed with
evaluating the circuit. DO NOT EXCEED 48 V AT V
IN
(J2).
2
LM25019 Evaluation Board SNVU225–April 2013
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