Datasheet

FB
SW
L1
C
OUT
LM25011A
BST
C
BST
D1
CS
VOUT
SGND
CSG
R
S
C
r
R
r
C
ac
R
FB1
Cff >
3 x t
ON(max)
R
FB1
//R
FB2
R1 =
V
RIPPLE
'I
LM25011, LM25011-Q1
www.ti.com
SNVS617G APRIL 2009REVISED FEBRUARY 2013
(24)
where ΔI is the minimum ripple current amplitude, which occurs at minimum Vin. The minimum value for Cff is
calculated from:
(25)
where t
ON(max)
is the maximum on-time (at minimum V
IN
), and R
FB1
//R
FB2
is the parallel equivalent of the feedback
resistors.
Option C) Minimum Ripple Configuration:
Figure 26. Option C: Minimum Output Ripple Configuration
In some applications, the ripple induced by series resistor R1 may not be acceptable. An external ripple circuit,
as shown in Figure 26, can be used to provide the required ripple to the FB pin.
1. The time constant τ=Rr*Cr should be greater than 8-10 times the switching period to generate a triangular
ramp at FB pin.
2. The smallest ripple at feedback ΔVFB = (VIN(min)-VOUT)*TON(max)/τ.
3. The ramp capacitor Cr should much smaller than the ac coupling capacitor Cac. Usually Cac=100nF,
Cr=1nF, and Rr is chosen to satisfy conditions 1 and 2 above.
PC BOARD LAYOUT
The LM25011 regulation and current limit comparators are very fast, and respond to short duration noise pulses.
Layout considerations are therefore critical for optimum performance. The layout must be as neat and compact
as possible, and all of the components must be as close as possible to their associated pins. The two major
current loops conduct currents which switch very fast, and therefore those loops must be as small as possible to
minimize conducted and radiated EMI. The first loop is formed by C
IN
, through the VIN to SW pins, L1, C
OUT
, and
back to C
IN
. The second current loop is formed by R
S
, D1, L1, C
OUT
and back to R
S
. The ground connection from
CSG to the ground end of C
IN
should be as short and direct as possible.
The power dissipation within the LM25011 can be approximated by determining the circuit’s total conversion loss
(P
IN
- P
OUT
), and then subtracting the power losses in the free-wheeling diode, the sense resistor, and the
inductor. The power loss in the diode is approximately:
P
D1
= I
OUT
x V
F
x (1-D) (26)
where Iout is the load current, V
F
is the diode’s forward voltage drop, and D is the on-time duty cycle. The power
loss in the sense resistor is:
P
RS
= (I
OUT
)
2
x R
S
x (1 D) (27)
The power loss in the inductor is approximately:
P
L1
= I
OUT
2
x R
L
x 1.1 (28)
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