Datasheet

UVLO
VIN
VCC
SW Pin
Inductor
Current
SS Pin
t2
V
OUT
7.0V
2.5V
t1
FB
SW
RTN
DRIVER
BST
SS
LM25010
7V BIAS
REGULATOR
+
-
SGND
ISEN
C6
GND
LEVEL
SHIFT
LOGIC
Driver
Gate Drive
UVLO
START
260 ns
OFF TIMER
OVER-VOLTAGE
COMPARATOR
GND
BYPASS
SWITCH
Shutdown
Input
THERMAL
SHUTDOWN
ON TIMER
COMPLETE
START
C5
C1
R
ON
Input
6V-42V
C3
C4
L1
D1
C2
R2
R1 R3
R
SENSE
50 m:
CURRENT LIMIT
COMPARATOR
REGULATION
COMPARATOR
2.9V
V
IN
Q1
R
CL
(optional)
V
OUT
62.5 mV
11.5 PA
2.5V
Q2
SD
R
ON
COMPLETE
V
CC
UVL
V
IN
SENSE
VCC
VIN
RON/SD
0.7V
LM25010
www.ti.com SNVS419D –DECEMBER 2005–REVISED FEBRUARY 2013
Block Diagram
white space
Figure 7. Startup Sequence
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