Datasheet

LM22680
SNVS595K SEPTEMBER 2008REVISED APRIL 2013
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Switching Frequency Adjustment and Synchronization
The LM22680 will operate in three different modes, depending on the condition of the RT/SYNC pin. With the
RT/SYNC pin floating, the regulator will switch at the internally set frequency of 500 kHz (typ.). With a resistor in
the range of 25 k to 200 k, connected from RT/SYNC to ground, the internal switching frequency can be
adjusted from 1MHz to 200 kHz. Figure 18 shows the typical curve for switching frequency vs. the external
resistance connected to the RT/SYNC pin. The accuracy of the switching frequency, in this mode, is slightly
worse than that of the internal oscillator; about +/- 25% is to be expected. Finally, an external clock can be
applied to the RT/SYNC pin to allow the regulator to synchronize to a system clock or another LM22680. The
mode is set during start-up of the regulator. When the LM22680 is enabled, or after V
IN
is applied, a weak pull-up
is connected to the RT/SYNC pin and, after approximately 100 µs, the voltage on the pin is checked against a
threshold of about 0.8V. With the RT/SYNC pin open, the voltage floats above this threshold, and the mode is set
to run with the internal clock. With a frequency set resistor present, an internal reference holds the pin voltage at
0.8V; the resulting current sets the mode to allow the resistor to control the clock frequency. If the external circuit
forces the RT/SYNC pin to a voltage much greater or less than 0.8v, the mode is set to allow external
synchronization. The mode is latched until either the EN or the input supply is cycled.
The choice of switching frequency is governed by several considerations. As an example, lower frequencies may
be desirable to reduce switching losses or improve duty cycle limits. Higher frequencies, or a specific frequency,
may be desirable to avoid problems with EMI or reduce the physical size of external components. The flexibility
of increasing the switching frequency above 500 kHz can also be used to operate outside a critical signal
frequency band for a given application. Keep in mind that the values of inductor and output capacitor cannot be
reduced dramatically, by operating above 500 kHz. This is true because the design of the internal loop
compensation restricts the range of these components.
Frequency synchronization requires some care. First the external clock frequency must be greater than the
internal clock frequency, and less than 1 MHz. The maximum internal switching frequency is ensured in the
Electrical Characteristics table. Note that the frequency adjust feature and the synchronization feature can not be
used simultaneously. The synchronizing frequency must always be greater than the internal clock frequency.
Secondly, the RT/SYNC pin must see a valid high or low voltage, during start-up, in order for the regulator to go
into the synchronizing mode (see above). Also, the amplitude of the synchronizing pulses must comport with
V
SYNC
levels found in the Electrical Characteristics table. The regulator will synchronize on the rising edge of the
external clock. If the external clock is lost during normal operation, the regulator will revert to the 500 kHz (typ.)
internal clock.
If the frequency synchronization feature is used, current limit foldback is not operational; see the Current Limit
section for details.
Figure 18. Switching Frequency vs RT/SYNC Resistor
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