Datasheet

LM22679/LM22679Q
SNVS581K –FEBRUARY 2013–REVISED NOVEMBER 2012 www.ti.com
Detailed Operating Description
The LM22679 incorporates a voltage mode constant frequency PWM architecture. In addition, input voltage feed-
forward is used to stabilize the loop gain against variations in input voltage. This allows the loop compensation to
be optimized for transient performance. The power MOSFET, in conjunction with the diode, produce a
rectangular waveform at the switch pin, that swings from about zero volts to VIN. The inductor and output
capacitor average this waveform to become the regulator output voltage. By adjusting the duty cycle of this
waveform, the output voltage can be controlled. The error amplifier compares the output voltage with the internal
reference and adjusts the duty cycle to regulate the output at the desired value.
The internal loop compensation of the -ADJ option is optimized for outputs of 5V and below. If an output voltage
of 5V or greater is required, the -5.0 option can be used with an external voltage divider. The minimum output
voltage is equal to the reference voltage; 1.285V (typ.).
The functional block diagram of the LM22679 is shown in Figure 11.
UVLO
The LM22679 also incorporates an input under voltage lock-out (UVLO) feature. This prevents the regulator from
turning on when the input voltage is not great enough to properly bias the internal circuitry. The rising threshold is
4.3V (typ.) while the falling threshold is 3.9V (typ.).
Duty-Cycle Limits
Ideally the regulator would control the duty cycle over the full range of zero to one. However due to inherent
delays in the circuitry, there are limits on both the maximum and minimum duty cycles that can be reliably
controlled. This in turn places limits on the maximum and minimum input and output voltages that can be
converted by the LM22679. A minimum on-time is imposed by the regulator in order to correctly measure the
switch current during a current limit event. A minimum off-time is imposed in order the re-charge the bootstrap
capacitor. The following equation can be used to determine the approximate maximum input voltage for a given
output voltage:
(1)
Where F
sw
is the switching frequency and T
ON
is the minimum on-time; both found in the Electrical
Characteristics table. Nominal values should be used. The worst case is lowest output voltage. If this input
voltage is exceeded, the regulator will skip cycles, effectively lowering the switching frequency. The
consequences of this are higher output voltage ripple and a degradation of the output voltage accuracy.
The second limitation is the maximum duty cycle before the output voltage will "dropout" of regulation. The
following equation can be used to approximate the minimum input voltage before dropout occurs:
(2)
The values of T
OFF
and R
DS(ON)
are found in the Electrical Characteristics table. The worst case here is largest
load. In this equation, R
L
is the D.C. inductor resistance. Of course, the lowest input voltage to the regulator must
not be less than 4.5V (typ.).
Current Limit
The LM22679 has current limiting to prevent the switch current from exceeding safe values during an accidental
overload on the output. This peak current limit is found in the Electrical Characteristics table under the heading of
I
CL
. The maximum load current that can be provided, before current limit is reached, is determined from the
following equation:
(3)
Where L is the value of the power inductor.
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