Datasheet

LOGIC
OSC
+
-
TYPE III
COMP
+
-
1.285V/SS
INT REG, EN,UVLO
GNDRT/SYNC
SW
BOOT
VIN
EN
FB
SS
VIN
VOUT
Error Amp.
PWM Cmp.
V
cc
ILimit
50 µA
LM22671
www.ti.com SNVS589M –SEPTEMBER 2008–REVISED APRIL 2013
SIMPLIFIED BLOCK DIAGRAM
Figure 13. Simplified Block Diagram
Detailed Operating Description
The LM22671 incorporates a voltage mode constant frequency PWM architecture. In addition, input voltage feed-
forward is used to stabilize the loop gain against variations in input voltage. This allows the loop compensation to
be optimized for transient performance. The power MOSFET, in conjunction with the diode, produce a
rectangular waveform at the switch pin, that swings from about zero volts to VIN. The inductor and output
capacitor average this waveform to become the regulator output voltage. By adjusting the duty cycle of this
waveform, the output voltage can be controlled. The error amplifier compares the output voltage with the internal
reference and adjusts the duty cycle to regulate the output at the desired value.
The internal loop compensation of the -ADJ option is optimized for outputs of 5V and below. If an output voltage
of 5V or greater is required, the -5.0 option can be used with an external voltage divider. The minimum output
voltage is equal to the reference voltage; 1.285V (typ.).
The functional block diagram of the LM22671 is shown in Figure 13 .
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