Datasheet

Vout

Vin

GND

Vout

GND

Vin

GND

Vout

GND

Vin

GND

Stability Considerations

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Figure 4 shows the current flow of a polarity-inverting (buck-boost) converter. The top schematic shows

dotted lines that represent the current flow during an on-state. The middle schematic shows the current

flow during an off-state. The bottom schematic shows the currents referred to as AC currents. These AC

currents are the most critical since current is changing in very short time periods. The dotted lines of the

bottom schematic show the traces to keep as short as possible. This will yield a small area reducing the

loop inductance. Comparing the AC traces of the polarity-inverting topology with a buck or boost topology

shows that the polarity-inverting topology has more critical AC traces. It is usually not possible to keep all

critical AC traces as tight as possible at the same time and some tradeoffs need to be made.

In sensitive applications, input and output voltage spikes may not be acceptable even when using low

ESR input and output filter capacitors. In such cases additional input and output L/C filters should be

considered.

Figure 4. Current Flow in a Polarity-Inverting (Buck-Boost) Application

14 Stability Considerations

Pulse width modulated switch mode DC/DC converters consist of a frequency response control loop. It is

necessary for the design to be stable over all operating conditions.

The value of the inductor, output capacitor, including ESR, as well as compensation capacitors, C6 and

C7, will influence the switching regulator loop stability. The polarity-inverting converter needs to be tested

for stability.

The first stability test is to observe the switch voltage waveform on the SW pin of the LM22670. This

waveform should be stable and free of jitter under all input voltage and load current conditions, which is an

indication of a stable design. The next stability measurement is a pulsating load test or load transient

response. During this test, the load current is pulsed (rectangular waveform, fast rise time) between

minimum and maximum load while the output voltage waveform is monitored with an oscilloscope. Under

these conditions, the output voltage should respond without excessive oscillation to load current changes.

This pulsating load test or load transient response also needs to be verified under all input voltage

conditions. If the switching regulator exhibits stability problems during these tests, the output capacitor

and/or compensation capacitors, C6 and C7, should be changed accordingly. For the LM22670 polarity-

inverting (buck-boost) application, the stability will typically improve with an increase in the capacitance

AN-1888 LM22670 Evaluation Board Inverting Topology SNVA363E–September 2008–Revised April 2013

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