Datasheet

LM21305
EN
R
EN2
V
EN-EXT
R
EN1
V
EN-EXT
= 1.2
R
EN1
R
EN2
©
§
©
§
1 +
LM21305
SNVS639F –DECEMBER 2009–REVISED MARCH 2013 www.ti.com
PRECISION ENABLE
The enable (EN) pin allows the output of the device to be enabled or disabled with an external control signal.
This pin is a precision analog input that enables the device when the voltage exceeds 1.2V (typical). The EN pin
has 200 mV (typical) of hysteresis and will disable the output when the enable voltage falls below 1.0V (typical).
If the EN pin is not used, it should be pulled up to AVIN via a 10 kΩ to 100 kΩ resistor. Since the enable pin has
a precise turn-on threshold, it can be used along with an external resistor divider network from an external
voltage to configure the device to turn on at a precise voltage. The precision enable circuitry will remain active
even when the device is disabled. The turn-on voltage with a divider can be found by
(2)
Figure 23. Use External Resistor To Set The EN Threshold
DEVICE ENABLE, SOFT-START AND PRE-BIAS STARTUP CAPABILITY
The device output can be turned off by removing AVIN or pulling the EN pin low. To enable the device, EN pin
must be high with the presence of AVIN and PVIN. Once enabled, the device engages the internal soft-start. The
soft-start feature allows the regulator output to gradually reach the steady state operating point, thus reducing
stresses on the input supply and controlling startup current. Soft-start begins at the rising edge of EN with AVIN
above UVLO level. It is important to make sure PVIN is high when soft-start begins. The LM21305 allows AVIN
to be higher than PVIN, or PVIN higher than AVIN, as long as both of them are within their operating voltage
ranges.
Soft-start of the LM21305 is controlled internally. It typically takes 2.7 ms to finish the soft-start sequence.
PGOOD will be high after soft-start is finished.
The LM21305 is in a pre-biased state when the device initiates startup with an output voltage greater than zero.
This often occurs in many multi-rail applications such as when powering an FPGA, ASIC, or DSP. In these
applications, the output can be pre-biased through parasitic conduction paths from one supply rail to another.
Even though the LM21305 is a synchronous converter, it will not pull the output low when a pre-bias condition
exists. During startup, the LM21305 will be in diode emulation mode with low-side switch turned off when zero
crossing of the inductor current is detected.
PEAK CURRENT PROTECTION AND NEGATIVE CURRENT LIMITING
The LM21305 switching regulator detects the peak inductor current and limits it to a value of 7A typical. To
determine the average current from the peak current, the inductor size, input and output voltage, and switching
frequency must be known. The average current limit can be found by :
(3)
When the peak inductor current sensed from the high-side switch reaches the current limit threshold, an over-
current event is triggered and the internal high-side FET turns off and the low-side FET turns on allowing the
inductor current to ramp down until the next switching cycle. When the high-side over-current condition persists,
the output voltage will be reduced by the reduced high-side switch on-time.
In cases such as output short circuit or when high-side switch minimum on-time conditions are reached, the high-
side switch current limiting may not be sufficient to limit the inductor current. The LM21305 features an additional
low-side switch current limit to prevent the inductor current from running away. The low-side switch current limit is
set higher than the high-side current limit, 8A typical. When the low-side switch current is higher than the limit
level, PWM pulses will be skipped until the low-side over-current event is not detected during the entire low-side
switch conduction time. Normal PWM switching subsequently occurs when the condition is removed. High-side
and low-side current protections result in a current limit that does not aggressively foldback for brief over-current
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