Datasheet

LM21215
www.ti.com
SNVS625E FEBRUARY 2011REVISED MARCH 2013
PIN DESCRIPTIONS
Pins Name Description
1 ILIM Resistor-programmable current limit pin. A resistor connected to this pin and ground will set the value of
the rising current limit I
CLR
. Shorting this pin to AGND will program the device to the maximum possible
current limit.
2 SS/TRK Soft-start control pin. An internal 2µA current source charges an external capacitor connected between
this pin and AGND to set the output voltage ramp rate during startup. This pin can also be used to
configure the tracking feature.
3 EN Active high enable input for the device. If not used, the EN pin can be left open, which will go high due to
an internal current source.
4 AVIN Analog input voltage supply that generates the internal bias. It is recommended to connect PVIN to AVIN
through a low pass RC filter to minimize the influence of input rail ripple and noise on the analog control
circuitry.
5,6,7 PVIN Input voltage to the power switches inside the device. These pins should be connected together at the
device. A low ESR input capacitance should be located as close as possible to these pins.
8,9,10 PGND Power ground pins for the internal power switches.
11-16 SW Switch node pins. These pins should be tied together locally and connected to the filter inductor.
17 PGOOD Open-drain power good indicator.
18 COMP Compensation pin is connected to the output of the voltage loop error amplifier.
19 FB Feedback pin is connected to the inverting input of the voltage loop error amplifier.
20 AGND Quiet analog ground for the internal reference and bias circuitry.
EP Exposed Pad Exposed metal pad on the underside of the package with an electrical and thermal connection to PGND.
It is recommended to connect this pad to the PC board ground plane in order to improve thermal
dissipation.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings
(1)(2)
PVIN
(3)
, AVIN to GND 0.3V to +6V
SW
(4)
, EN, FB, COMP, PGOOD, SS/TRK to GND 0.3V to PVIN + 0.3V
Storage Temperature 65°C to 150°C
Lead Temperature (Soldering, 10 sec.) 260°C
ESD Rating, Human Body Model
(5)
±2kV
(1) Absolute Maximum Ratings indicate limits beyond witch damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications and test
conditions, see the Electrical Characteristics.
(2) If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/Distributors for availability and
specifications.
(3) The PVIN pin can tolerate transient voltages up to 6.5 V for a period of up to 6ns. These transients can occur during the normal
operation of the device.
(4) The SW pin can tolerate transient voltages up to 9.0 V for a period of up to 6ns, and -1.0V for a duration of 4ns. These transients can
occur during the normal operation of the device.
(5) The human body model is a 100 pF capacitor discharged through a 1.5 k resistor to each pin.
Operating Ratings
(1)
PVIN, AVIN to GND +2.95V to +5.5V
Junction Temperature 40°C to +125°C
θ
JA
(2)
24°C/W
(1) Absolute Maximum Ratings indicate limits beyond witch damage to the device may occur. Operating Ratings indicate conditions for
which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications and test
conditions, see the Electrical Characteristics.
(2) Thermal measurements were performed on a 2x2 inch, 4 layer, 2 oz. copper outer layer, 1 oz.copper inner layer board with twelve 8 mil.
vias underneith the EP of the device and an additional sixteen 8 mil. vias under the unexposed package.
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