Datasheet

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PGOOD

LM21215

OUT

AGND

COMP

PVIN

ILIM

OUT

FB1

FB2

PGND

AVIN

11-16

8,9,10

5,6,7

SS/

TRK

optional

HTSSOP-20

optional

ILIM

LM21215

www.ti.com

SNVS625E –FEBRUARY 2011–REVISED MARCH 2013

15A High Efficiency Point of Load Synchronous Buck Regulator

Check for Samples: LM21215

FEATURES

APPLICATIONS

• Integrated 7.0 mΩ High Side and 4.3 mΩ Low

• Broadband, Networking and Wireless

Side FET Switches Communications

• Adjustable Current Limit • High-Performance FPGAs, ASICs and

Microprocessors

• Adjustable Output Voltage From 0.6V to V

(100% Duty Cycle Capable), ±1% Reference • Simple to Design, High Efficiency Point of

Load Regulation From a 5V or 3.3V Bus

• Input Voltage Range 2.95V to 5.5V

• 500 kHz Fixed Switching Frequency

DESCRIPTION

• Startup Into Pre-Biased Loads

The LM21215 is a monolithic synchronous point of

• Output Voltage Tracking Capability

load buck regulator that is capable of delivering up to

15A of continuous output current while producing an

• Wide Bandwidth Voltage Loop Error Amplifier

output voltage down to 0.6V with outstanding

• Adjustable Soft-Start With External Capacitor

efficiency. The device is optimized to work over an

• Precision Enable Pin With Hysteresis

input voltage range of 2.95V to 5.5V, making it suited

• Integrated OVP, OTP, UVLO and Power-Good

for a wide variety of low voltage systems. The voltage

mode control loop provides high noise immunity,

• Thermally Enhanced HTSSOP-20 Exposed Pad

narrow duty cycle capability and can be compensated

Package

to be stable with any type of output capacitance,

providing maximum flexibility and ease of use.

Simplified Application Circuit

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of

Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

2All trademarks are the property of their respective owners.

PRODUCTION DATA information is current as of publication date.

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.

Summary of content (33 pages)

PAGE 1
LM21215 www.ti.com SNVS625E – FEBRUARY 2011 – REVISED MARCH 2013 15A High Efficiency Point of Load Synchronous Buck Regulator Check for Samples: LM21215 FEATURES APPLICATIONS • • 1 2 • • • • • • • • • • • Integrated 7.0 mΩ High Side and 4.3 mΩ Low Side FET Switches Adjustable Current Limit Adjustable Output Voltage From 0.6V to VIN (100% Duty Cycle Capable), ±1% Reference Input Voltage Range 2.95V to 5.
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LM21215 SNVS625E – FEBRUARY 2011 – REVISED MARCH 2013 www.ti.com DESCRIPTION (CONTINUED) The LM21215 features internal over voltage protection (OVP) and resistor-programmable over-current protection (OCP) for increased system reliability. A precision enable pin and integrated UVLO allow turn-on of the device to be tightly controlled and sequenced. Startup inrush currents are limited by both an internally fixed and externally adjustable soft-start circuit.
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LM21215 www.ti.com SNVS625E – FEBRUARY 2011 – REVISED MARCH 2013 PIN DESCRIPTIONS Pins Name 1 ILIM Resistor-programmable current limit pin. A resistor connected to this pin and ground will set the value of the rising current limit ICLR. Shorting this pin to AGND will program the device to the maximum possible current limit. 2 SS/TRK Soft-start control pin.
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LM21215 SNVS625E – FEBRUARY 2011 – REVISED MARCH 2013 www.ti.com Electrical Characteristics Unless otherwise stated, the following conditions apply: VPVIN, AVIN = 5V. Limits in standard type are for TJ = 25°C only, limits in bold face type apply over the junction temperature (TJ) range of −40°C to +125°C. Minimum and maximum limits are specified through test, design, or statistical correlation.
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LM21215 www.ti.com SNVS625E – FEBRUARY 2011 – REVISED MARCH 2013 Electrical Characteristics (continued) Unless otherwise stated, the following conditions apply: VPVIN, AVIN = 5V. Limits in standard type are for TJ = 25°C only, limits in bold face type apply over the junction temperature (TJ) range of −40°C to +125°C. Minimum and maximum limits are specified through test, design, or statistical correlation.
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LM21215 SNVS625E – FEBRUARY 2011 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics Unless otherwise specified: VIN = 5V, VOUT = 1.2V, L= 0.56µH (1.8mΩ RDCR), CSS = 33nF, TA = 25°C for efficiency curves, loop gain plots and waveforms, and TJ = 25°C for all others. Efficiency 100 Efficiency (VOUT = 3.3 V, Inductor P/N SER2010-02MLD) 100 VIN = 3.3V VIN = 5.0V 98 99 98 EFFICIENCY (%) 94 92 90 88 86 97 96 95 94 93 84 92 82 91 80 90 0 3 6 9 12 OUTPUT CURRENT (A) 15 VIN = 4.
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LM21215 www.ti.com SNVS625E – FEBRUARY 2011 – REVISED MARCH 2013 Typical Performance Characteristics (continued) Unless otherwise specified: VIN = 5V, VOUT = 1.2V, L= 0.56µH (1.8mΩ RDCR), CSS = 33nF, TA = 25°C for efficiency curves, loop gain plots and waveforms, and TJ = 25°C for all others. Enable Threshold and Hysteresis vs. Temperature VFB(V) VIHENR(V) 0.601 0.600 0.599 0.598 144 1.35 136 1.34 128 1.33 120 1.32 112 1.31 104 1.30 96 1.29 88 1.
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LM21215 SNVS625E – FEBRUARY 2011 – REVISED MARCH 2013 www.ti.com Typical Performance Characteristics (continued) Unless otherwise specified: VIN = 5V, VOUT = 1.2V, L= 0.56µH (1.8mΩ RDCR), CSS = 33nF, TA = 25°C for efficiency curves, loop gain plots and waveforms, and TJ = 25°C for all others. FET Resistance vs. Temperature 10 LOW SIDE HIGH SIDE 9 8 10 7 9 6 8 5 7 4 6 3 5 2 4 -40 -20 0 20 40 60 80 100 120 JUNCTION TEMPERATURE (°C) 3.5 4.0 4.5 VIN(V) 5.0 Peak Current Limit (ICLR) vs.
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LM21215 www.ti.com SNVS625E – FEBRUARY 2011 – REVISED MARCH 2013 Typical Performance Characteristics (continued) Unless otherwise specified: VIN = 5V, VOUT = 1.2V, L= 0.56µH (1.8mΩ RDCR), CSS = 33nF, TA = 25°C for efficiency curves, loop gain plots and waveforms, and TJ = 25°C for all others. Figure 18. Figure 19. Output Voltage Ripple (IOUT = 15A) Startup with Prebiased Output VOUT (500 mV/Div) VOUT (10 mV/Div) VPGOOD (5V/Div) VENABLE (5V/Div) 2 ms/DIV 2 µs/DIV Figure 20. Figure 21.
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LM21215 SNVS625E – FEBRUARY 2011 – REVISED MARCH 2013 www.ti.com Block Diagram CURRENT LIMIT ILIM Ilimit high VREF AVIN PVIN Over temp + - PVIN UVLO 2.7V + - SD OR Driver Precision enable AVIN 1.35V + - EN Control Logic PWM comparator Zero-cross AVIN OSC RAMP + - + - PWM SW INT SS PVIN + SS/TRK 0.6V EA Driver FB OVP COMP 0.68V 0.
PAGE 11
LM21215 www.ti.com SNVS625E – FEBRUARY 2011 – REVISED MARCH 2013 UVLO The LM21215 has a built-in under-voltage lockout protection circuit that keeps the device from switching until the input voltage reaches 2.7V (typical). The UVLO threshold has 200 mV of hysteresis that keeps the device from responding to power-on glitches during start up.
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LM21215 SNVS625E – FEBRUARY 2011 – REVISED MARCH 2013 www.ti.com Iclr IL Iclf VSS VFB 100 mV VOUT VSW CURRENT LIMIT SHORT-CIRCUIT REMOVED SHORT-CIRCUIT Figure 25. Current Limit Conditions THERMAL PROTECTION Internal thermal shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. When activated, typically at 165°C, the LM21215 tri-states the power FETs and resets soft start.
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LM21215 www.ti.com SNVS625E – FEBRUARY 2011 – REVISED MARCH 2013 t RESETSS V ss 0.6V Vovp VOVPHYS VFB Vuvp VUVPHYS VEN V PGOOD V SW OVP UVP DISABLE tPGDGL PRE-BIASED STARTUP t PGDGH Figure 26. PGOOD Conditions LIGHT LOAD OPERATION The LM21215 offers increased efficiency when operating at light loads.
PAGE 14
LM21215 Switchnode Voltage SNVS625E – FEBRUARY 2011 – REVISED MARCH 2013 www.ti.com Continuous Conduction Mode (CCM) VIN Time (s) Inductor Current Continuous Conduction Mode (CCM) IAVERAGE Inductor Current Time (s) DCM - CCM Boundary IAVERAGE Switchnode Voltage Time (s) Discontinuous Conduction Mode (DCM) VIN Inductor Current Time (s) Discontinuous Conduction Mode (DCM) IPeak Time (s) Figure 27.
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LM21215 www.ti.com SNVS625E – FEBRUARY 2011 – REVISED MARCH 2013 DESIGN GUIDE OUTPUT VOLTAGE The first step in designing the LM21215 application is setting the output voltage. This is done by using a voltage divider between VOUT and AGND, with the middle node connected to VFB . When operating under steady-state conditions, the LM21215 will force VOUT such that VFB is driven to 0.6 V. VOUT LM21215 RFB1 0.6V FB RFB2 Figure 28.
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LM21215 SNVS625E – FEBRUARY 2011 – REVISED MARCH 2013 www.ti.com SOFT START When EN has exceeded 1.35V, and both PVIN and AVIN have exceeded the UVLO threshold, the LM21215 will begin charging the output linearly to the voltage level dictated by the feedback resistor network. The LM21215 employs a user adjustable soft start circuit to lengthen the charging time of the output set by a capacitor from the soft start pin to ground. After enable exceeds 1.
PAGE 17
LM21215 www.ti.com SNVS625E – FEBRUARY 2011 – REVISED MARCH 2013 VSW VIN Time IL IL AVG = IOUT 'IL Time Figure 31. Switch and Inductor Current Waveforms Once the ripple current has been determined, the appropriate inductor size can be calculated using the following equation: L= (VIN ± VOUT) D üIL fSW (5) OUTPUT CAPACITOR SELECTION The output capacitor, COUT, filters the inductor ripple current and provides a source of charge for transient load conditions.
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LM21215 SNVS625E – FEBRUARY 2011 – REVISED MARCH 2013 VDROOP = 'IOUTSTEP x RESR + www.ti.
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LM21215 www.ti.
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LM21215 SNVS625E – FEBRUARY 2011 – REVISED MARCH 2013 www.ti.com There are three transfer functions that must be taken into consideration when obtaining the total open loop transfer function; COMP to SW (Modulator) , SW to VOUT (Power Train), and VOUT to COMP (Error Amplifier). The COMP to SW transfer function is simply the gain of the PWM modulator. V GPWM = üVinramp where • ΔVRAMP is the oscillator peak-to-peak ramp voltage (nominally 0.
PAGE 21
LM21215 SNVS625E – FEBRUARY 2011 – REVISED MARCH 2013 GAIN (dB) 100 GAIN PHASE 90 80 45 60 0 40 -45 20 -90 0 -135 -20 -180 100 1k 10k 100k 1M FREQUENCY (Hz) PHASE (°) www.ti.com 10M Figure 34. Type 3 Compensation Network Bode Plot As seen in Figure 34, the two zeros (fLC/2, fLC) in the comensation network give a phase boost. This will cancel out the effects of the phase loss from the output filter. The compensation network also adds two poles to the system.
PAGE 22
LM21215 SNVS625E – FEBRUARY 2011 – REVISED MARCH 2013 www.ti.com accurately calculate the compensation network. The example given here is the total output capacitance using the three MLCC output capacitors biased at 1.2V, as seen in the typical application schematic, Figure 39.
PAGE 23
LM21215 www.ti.com SNVS625E – FEBRUARY 2011 – REVISED MARCH 2013 It is important to verify the stability by either observing the load transient response or by using a network analyzer. A phase margin between 45° and 70° is usually desired for voltage mode systems. Excessive phase margin can cause slow system response to load transients and low phase margin may cause an oscillatory load transient response.
PAGE 24
LM21215 SNVS625E – FEBRUARY 2011 – REVISED MARCH 2013 www.ti.com MAX. AMBIENT TEMERATURE (°C) 125 120 115 110 105 100 95 90 85 80 0 3 6 9 12 OUTPUT CURRENT (A) 15 Figure 37. Maximum Ambient Temperature vs. Output Current (0 LFM) PCB LAYOUT CONSIDERATIONS PC board layout is an important part of DC-DC converter design. Poor board layout can disrupt the performance of a DC-DC converter and surrounding circuitry by contributing to EMI, ground bounce, and resistive voltage loss in the traces.
PAGE 25
LM21215 www.ti.com SNVS625E – FEBRUARY 2011 – REVISED MARCH 2013 6. Provide adequate device heatsinking. For most 15A designs a four layer board is recommended. Use as many vias as is possible to connect the EP to the power plane heatsink. The vias located undernieth the EP will wick solder into them if they are not filled. Complete solder coverage of the EP to the board is required to achieve the θJA values described in the previous section.
PAGE 26
LM21215 SNVS625E – FEBRUARY 2011 – REVISED MARCH 2013 www.ti.com HTSSOP-20 5,6,7 VIN 3 RF 4 CIN1 CIN2 CIN3 PVIN LO SW VOUT CC3 EN RFB1 RC2 AVIN CF LM21215 FB CSS 11-16 2 SS / TRK COMP CO1 CO2 CO3 19 18 CC1 RC1 RFB2 CC2 VIN 1 ILIM RILIM 17 PGOOD PGND AGND 8,9,10 RPGOOD 20 Figure 39. Typical Application Schematic 1 Table 1. Bill of Materials (VIN = 3.3 - 5.5V, VOUT = 1.
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LM21215 www.ti.com SNVS625E – FEBRUARY 2011 – REVISED MARCH 2013 HTSSOP-20 LO 5,6,7 VIN PVIN CIN1 RF REN1 3 4 CF SW VOUT CC3 EN RFB1 RC2 AVIN REN2 LM21215 FB CSS 11-16 2 SS/ TRK COMP CO1 CO2 19 18 CC1 RC1 RFB2 CC2 VIN 1 ILIM PGOOD 17 RPGOOD PGND AGND RILIM 8,9,10 20 Figure 40. Typical Application Schematic 2 Table 2. Bill of Materials (VIN = 4.0 - 5.5V, VOUT = 0.
PAGE 28
LM21215 SNVS625E – FEBRUARY 2011 – REVISED MARCH 2013 www.ti.com REVISION HISTORY Changes from Revision D (March 2013) to Revision E • 28 Page Changed layout of National Data Sheet to TI format ..........................................................................................................
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PACKAGE OPTION ADDENDUM www.ti.
PAGE 30
PACKAGE MATERIALS INFORMATION www.ti.com 11-Oct-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) LM21215MHE/NOPB HTSSOP PWP 20 250 178.0 16.4 LM21215MHX/NOPB HTSSOP PWP 20 2500 330.0 16.4 Pack Materials-Page 1 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 6.95 7.1 1.6 8.0 16.0 Q1 6.95 7.1 1.6 8.0 16.
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PACKAGE MATERIALS INFORMATION www.ti.com 11-Oct-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM21215MHE/NOPB HTSSOP PWP LM21215MHX/NOPB HTSSOP PWP 20 250 210.0 185.0 35.0 20 2500 367.0 367.0 35.
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MECHANICAL DATA PWP0020AA MYB20XX (REV E) 4214875/A NOTES: A. All linear dimensions are in millimeters. Dimensioning and tolerancing per ASME Y14.5M-1994. B. This drawing is subject to change without notice. C. Reference JEDEC Registration MO-153, Variation ACT. www.ti.
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