Datasheet

LM21215A
www.ti.com SNOSB87B –MARCH 2011–REVISED MARCH 2013
PIN DESCRIPTIONS
Pins Name Description
1 SYNC Frequency Synchronization input pin. Applying a clock signal to this pin will force the
device to switch at the clock frequency. If left unconnected, the frequency will default to
500 kHz.
2 SS/TRK Soft-start control pin. An internal 2 µA current source charges an external capacitor
connected between this pin and AGND to set the output voltage ramp rate during
startup. This pin can also be used to configure the tracking feature.
3 EN Active high enable input for the device. If not used, the EN pin can be left open, which
will go high due to an internal current source.
4 AVIN Analog input voltage supply that generates the internal bias. It is recommended to
connect PVIN to AVIN through a low pass RC filter to minimize the influence of input rail
ripple and noise on the analog control circuitry.
5,6,7 PVIN Input voltage to the power switches inside the device. These pins should be connected
together at the device. A low ESR input capacitance should be located as close as
possible to these pins.
8,9,10 PGND Power ground pins for the internal power switches.
11-16 SW Switch node pins. These pins should be tied together locally and connected to the filter
inductor.
17 PGOOD Open-drain power good indicator.
18 COMP Compensation pin is connected to the output of the voltage loop error amplifier.
19 FB Feedback pin is connected to the inverting input of the voltage loop error amplifier.
20 AGND Quiet analog ground for the internal reference and bias circuitry.
EP Exposed Pad Exposed metal pad on the underside of the package with an electrical and thermal
connection to PGND. It is recommended to connect this pad to the PC board ground
plane in order to improve thermal dissipation.
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