Datasheet

C
IN1
VIN
SW
AGND
FB
PGOOD
V
OUT
R
FB1
R
FB2
C
OUT
EN
SS/TRK
VCC
C
VCC
C
C1
RT
R
C1
V
IN
LM20343
BOOT
GND
L
C
BOOT
D1
(Optional)
C
SS
R
PG
V
PULLUP
C
IN2
COMP
R
RT
LM20343
www.ti.com SNVS559B –MAY 2008–REVISED APRIL 2013
PRE-BIAS STARTUP CAPABILITY
The LM20343 is in a pre-biased state when it starts up with an output voltage greater than zero. This often
occurs in many multi-rail applications such as when powering an FPGA, ASIC, or DSP. In these applications the
output can be pre-biased through parasitic conduction paths from one supply rail to another. Even though the
LM20343 is a synchronous converter, it will not pull the output low when a pre-bias condition exists. During start
up the LM20343 will not sink current until the soft-start voltage exceeds the voltage on the FB pin. Since the
device cannot sink current, it protects the load from damage that might otherwise occur if current is conducted
through the parasitic paths of the load.
POWER GOOD AND OVER VOLTAGE FAULT HANDLING
The LM20343 has built in under and over voltage comparators that control the power switches. Whenever there
is an excursion in output voltage above the set OVP threshold, the part will terminate the present on-pulse, turn-
on the low-side FET, and pull the PGOOD pin low. The low-side FET will remain on until either the FB voltage
falls back into regulation or the negative current limit is triggered which in turn tri-states the FETs. If the output
reaches the UVP threshold the part will continue switching and the PGOOD pin will be deasserted and go low.
Typical values for the PGOOD resistor are on the order of 100 kΩ or less. To avoid false tripping during transient
glitches the PGOOD pin has 20 µs of built in deglitch time to both rising and falling edges.
UVLO
The LM20343 has an internal under-voltage lockout protection circuit that keeps the device from switching until
the input voltage reaches 4.25V (typical). The UVLO threshold has 350 mV of hysteresis that keeps the device
from responding to power-on glitches during start up. If desired the turn-on point of the supply can be changed
by using the precision enable pin and a resistor divider network connected to V
IN
as shown in Figure 29 in the
design guide.
THERMAL PROTECTION
Internal thermal shutdown circuitry is provided to protect the integrated circuit in the event that the maximum
junction temperature is exceeded. When activated, typically at 170°C, the LM20343 tri-states the power FETs
and resets soft-start. After the junction cools to approximately 150°C, the part starts up using the normal start up
routine. This feature is provided to prevent catastrophic failures from accidental device overheating.
Design Guide
This section walks the designer through the steps necessary to select the external components to build a fully
functional power supply. As with any DC-DC converter numerous trade-offs are possible to optimize the design
for efficiency, size, or performance. These will be taken into account and highlighted throughout this discussion.
To facilitate component selection discussions the circuit shown in Figure 25 below may be used as a reference.
Unless otherwise indicated all formulas assume units of amps (A) for current, farads (F) for capacitance, henries
(H) for inductance and volts (V) for voltages.
Figure 25. Typical Application Circuit
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