Datasheet

VIN
1
FB
SS/TRK
SW
VIN
GND AGND
SW
EN
VIN
PGOOD
COMP
EP
VCC
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
SW
GND GND
SW
VIN
RT
BOOT
LM20242
SNVS534E –OCTOBER 2007–REVISED MARCH 2013 www.ti.com
Connection Diagram
Figure 1. Top View
HTSSOP Package
PIN DESCRIPTIONS
Pin(s) Name Description Application Information
1 SS/TRK Soft-Start or Tracking control input An internal 5 µA current source charges an external capacitor to set the
soft-start rate. The PWM can Track to an external voltage ramp with a
low impedance source. If left open, an internal 1 ms SS ramp is
activated.
2 FB Feedback input to the error amplifier This pin is connected to the inverting input of the internal
from the regulated output transconductance error amplifier. An 800 mV reference is internally
connected to the non-inverting input of the error amplifier.
3 PGOOD Power good output signal Open drain output indicating the output voltage is regulating within
tolerance. A pull-up resistor of 10 kΩ to 100 kΩ is recommended if this
function is used.
4 COMP Output of the internal error amplifier and The loop compensation network should be connected between the
input to the Pulse Width Modulator COMP pin and the AGND pin.
5,6,15,16 VIN Input supply voltage Nominal operating range: 4.5V to 36V.
7,8,13,14 SW Switch pin The drain terminal of the internal Synchronous Rectifier power
NMOSFET and the source terminal of the internal Control power
NMOSFET.
9,10,11 GND Ground Internal reference for the power MOSFETs.
12 AGND Analog ground Internal reference for the regulator control functions.
17 BOOT Boost input for bootstrap capacitor An internal diode from VCC to BOOT charges an external capacitor
required from SW to BOOT to power the Control MOSFET gate driver.
18 VCC Output of the high voltage linear VCC tracks VIN up to about 7.2V. Above VIN = 7.2V, VCC is regulated
regulator. The VCC voltage is regulated to approximately 5.5 Volts. A 0.1 µF to 1 µF ceramic decoupling
to approximately 5.5V. capacitor is required. The VCC pin is an output only.
19 EN Enable or UVLO input An external voltage divider can be used to set the line undervoltage
lockout threshold. If the EN pin is left unconnected, a 2 µA pull-up
current source pulls the EN pin high to enable the regulator.
20 RT Internal oscillator frequency adjust input Normally biased at 550 mV. An external resistor connected between RT
and AGND sets the internal oscillator frequency.
EP Exposed Exposed pad Exposed metal pad on the underside of the package with a weak
Pad electrical connection to GND. Connect this pad to the PC board ground
plane in order to improve heat dissipation.
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