Datasheet

LM1876
www.ti.com SNAS097C –MAY 1999–REVISED APRIL 2013
APPLICATION INFORMATION
MUTE MODE
By placing a logic-high voltage on the mute pins, the signal going into the amplifiers will be muted. If the mute
pins are left floating or connected to a logic-low voltage, the amplifiers will be in a non-muted state. There are
two mute pins, one for each amplifier, so that one channel can be muted without muting the other if the
application requires such a configuration. Refer to Typical Performance Characteristics for Figure 22 and
Figure 23.
STANDBY MODE
The standby mode of the LM1876 allows the user to drastically reduce power consumption when the amplifiers
are idle. By placing a logic-high voltage on the standby pins, the amplifiers will go into Standby Mode. In this
mode, the current drawn from the V
CC
supply is typically less than 10 μA total for both amplifiers. The current
drawn from the V
EE
supply is typically 4.2 mA. Clearly, there is a significant reduction in idle power consumption
when using the standby mode. There are two Standby pins, so that one channel can be put in standby mode
without putting the other amplifier in standby if the application requires such flexibility. Refer to Typical
Performance Characteristics for Figure 39 and Figure 40.
UNDER-VOLTAGE PROTECTION
Upon system power-up, the under-voltage protection circuitry allows the power supplies and their corresponding
capacitors to come up close to their full values before turning on the LM1876 such that no DC output spikes
occur. Upon turn-off, the output of the LM1876 is brought to ground before the power supplies such that no
transients occur at power-down.
OVER-VOLTAGE PROTECTION
The LM1876 contains over-voltage protection circuitry that limits the output current to approximately 3.5 Apk
while also providing voltage clamping, though not through internal clamping diodes. The clamping effect is quite
the same, however, the output transistors are designed to work alternately by sinking large current spikes.
SPiKe PROTECTION
The LM1876 is protected from instantaneous peak-temperature stressing of the power transistor array. The
Figure 30 in Typical Performance Characteristics shows the area of device operation where SPiKe Protection
Circuitry is not enabled. The waveform to the right of the SOA graph exemplifies how the dynamic protection will
cause waveform distortion when enabled.
THERMAL PROTECTION
The LM1876 has a sophisticated thermal protection scheme to prevent long-term thermal stress of the device.
When the temperature on the die reaches 165°C, the LM1876 shuts down. It starts operating again when the die
temperature drops to about 155°C, but if the temperature again begins to rise, shutdown will occur again at
165°C. Therefore, the device is allowed to heat up to a relatively high temperature if the fault condition is
temporary, but a sustained fault will cause the device to cycle in a Schmitt Trigger fashion between the thermal
shutdown temperature limits of 165°C and 155°C. This greatly reduces the stress imposed on the IC by thermal
cycling, which in turn improves its reliability under sustained fault conditions.
Since the die temperature is directly dependent upon the heat sink used, the heat sink should be chosen such
that thermal shutdown will not be reached during normal operation. Using the best heat sink possible within the
cost and space constraints of the system will improve the long-term reliability of any power semiconductor
device, as discussed in DETERMINING THE CORRECT HEAT SINK.
DETERMlNlNG MAXIMUM POWER DISSIPATION
Power dissipation within the integrated circuit package is a very important parameter requiring a thorough
understanding if optimum power output is to be obtained. An incorrect maximum power dissipation calculation
may result in inadequate heat sinking causing thermal shutdown and thus limiting the output power.
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