Datasheet

LM12L458

SNAS085B –JULY 1999–REVISED MARCH 2013

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Instruction RAM “01”

The second Instruction RAM section is selected by placing a “01” in Bits 8 and 9 of the Configuration register.

Bits 0–7 hold “watchdog” limit #1. When Bit 11 of Instruction RAM “00” is set to a “1”, the LM12L458 performs a

“watchdog” comparison of the sampled analog input signal with the limit #1 value first, followed by a comparison

of the same sampled analog input signal with the value found in limit #2 (Instruction RAM “10”).

Bit 8 holds limit #1's sign.

Bit 9's state determines the limit condition that generates a “watchdog” interrupt. A “1” causes a voltage greater

than limit #1 to generate an interrupt, while a “0” causes a voltage less than limit #1 to generate an interrupt.

Bits 10–15 are not used.

Instruction RAM “10”

The third Instruction RAM section is selected by placing a “10” in Bits 8 and 9 of the Configuration register.

Bits 0–7 hold “watchdog” limit #2. When Bit 11 of Instruction RAM “00” is set to a “1”, the LM12L458 performs a

“watchdog” comparison of the sampled analog input signal with the limit #1 value first (Instruction RAM “01”),

followed by a comparison of the same sampled analog input signal with the value found in limit #2.

Bit 8 holds limit #2's sign.

Bit 9's state determines the limit condition that generates a “watchdog” interrupt. A “1” causes a voltage greater

than

limit #2 to generate an interrupt, while a “0” causes a voltage less than limit #2 to generate an interrupt.

Bits 10–15 are not used.

CONFIGURATION REGISTER

The Configuration register, 1000 (A4–A1, BW = 0) or 1000x (A4–A0, BW = 1) is a 16-bit control register with

read/write capability. It acts as the LM12L458's “control panel” holding global information as well as start/stop,

reset, self-calibration, and stand-by commands.

Bit 0 is the START/STOP bit. Reading Bit 0 returns an indication of the Sequencer's status. A “0” indicates that

the Sequencer is stopped and waiting to execute the next instruction. A “1” shows that the Sequencer is running.

Writing a “0” halts the Sequencer when the current instruction has finished execution. The next instruction to be

executed is pointed to by the instruction pointer found in the status register. A “1” restarts the Sequencer with the

instruction currently pointed to by the instruction pointer. (See Bits 8–10 in the Interrupt Status register.)

Bit 1 is the LM12L458's system RESET bit. Writing a “1” to Bit 1 stops the Sequencer (resetting the

Configuration register's START/STOP bit), resets the Instruction pointer to “000” (found in the Interrupt Status

clock cycles unless it is forced high by writing a “1” into the Configuration register's Standby bit. A reset signal is

internally generated when power is first applied to the part. No operation should be started until the RESET bit is

“0”.

Writing a “1” to Bit 2 initiates an auto-zero offset voltage calibration. Unlike the eight-sample auto-zero calibration

performed during the full calibration procedure, Bit 2 initiates a “short” auto-zero by sampling the offset once and

creating a correction coefficient (full calibration averages eight samples of the converter offset voltage when

creating a correction coefficient). If the Sequencer is running when Bit 2 is set to “1”, an auto-zero starts

immediately after the conclusion of the currently running instruction. Bit 2 is reset automatically to a “0” and an

interrupt flag (Bit 3, in the Interrupt Status register) is set at the end of the auto-zero (76 clock cycles). After

completion of an auto-zero calibration, the Sequencer fetches the next instruction as pointed to by the Instruction

RAM's pointer and resumes execution. If the Sequencer is stopped, an auto-zero is performed immediately at the

time requested.

Product Folder Links: LM12L458